74LVQ161

Features:

` HIGH SPEED: fMAX = 180 MHz (TYP.) at VCC = 3.3 V
` COMPATIBLE WITH TTL OUTPUTS
` LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C
` LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V
` 75 TRANSMISSION LINE DRIVING CAPABILITY
` SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12A (MIN) at VCC = 3.0 V
` PCI BUS LEVELS GUARANTEED AT 24 mA
` BALANCED PROPAGATION DELAYS: tPLH tPHL
` OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
` PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 161
` IMPROVED LATCH-UP IMMUNITY


Pinout




Specifications

SYMBOL	PARAMETER	Value	UNIT
VCC	Supply voltagee	0.5 to+ 7	V
VI	DC Input Voltage	-0.5 to VCC + 0.5	V
VO	DC Output Voltage	-0.5 to VCC + 0.5	V
IIK	DC Input Diode Current	± 20	mA
IOK	DC Output Diode Current	± 20	mA
IO	DC Output Current	± 50	mA
ICC or IGND	DC VCC or Ground Current	± 200	mA
Tstg	Storage temperature	65 to 150
TL	Lead Temperature (10 sec)	300

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied


Description

The 74LVQ161 is a low voltage CMOS SYNCHRONOUS PRESETTABLE COUNTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. It is a 4 bit binary counter with Asynchronous Clear.

The circuit have four fundamental modes of operation, in order of preference: synchronousreset, parallel load, count-up and hold. Four control inputs, Master Reset (CLEAR), Parallel Enable Input (PE) and Count Enable Carry Input (TE), determine the mode of operation as shown in the Truth Table. A LOW signal on CLEAR overrides counting and parallel loading and sets all outputs on LOW state. A LOW signal onLOAD overrides counting and allows information on Parallel Data Qn inputs to be loaded into the flip-flops on the next rising edge ofCLOCK. With LOAD and CLEAR, PE and TE permit counting when both are high. Conversely, a LOW signal on either PE and TE inhibits counting. All inputs and outputs of the 74LVQ161 are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.