74LVQ02

Features: ·HIGHSPEED: tPD = 5 ns (TYP.) atVCC = 3.3V·COMPATIBLEWITH TTL OUTPUTS·LOWPOWERDISSIPATION: ICC =2 mA (MAX.) at TA =25 oC· LOWNOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V·75W TRANSMISSIONLINEDRIVING CAPABILITY·SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN)·PCI BUSLEVELSGUARANTEED AT 2...

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74LVQ02 Picture
SeekIC No. : 004251439 Detail

74LVQ02: Features: ·HIGHSPEED: tPD = 5 ns (TYP.) atVCC = 3.3V·COMPATIBLEWITH TTL OUTPUTS·LOWPOWERDISSIPATION: ICC =2 mA (MAX.) at TA =25 oC· LOWNOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V·75W TRANSMISSIONLINEDR...

floor Price/Ceiling Price

Part Number:
74LVQ02
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/2/15

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Product Details

Description



Features:

·HIGHSPEED: tPD = 5 ns (TYP.) atVCC = 3.3V
·COMPATIBLEWITH TTL OUTPUTS
·LOWPOWERDISSIPATION: ICC =2 mA (MAX.) at TA =25 oC
· LOWNOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V
·75W TRANSMISSIONLINEDRIVING CAPABILITY
·SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN)
·PCI BUSLEVELSGUARANTEED AT 24mA
·BALANCEDPROPAGATIONDELAYS: tPLH @ tPHL
·OPERATINGVOLTAGERANGE: VCC (OPR)= 2V to 3.6V(1.2VData Retention)
· PINANDFUNCTION COMPATIBLEWITH 74 SERIES02
·IMPROVEDLATCH-UP IMMUNITY



Pinout

  Connection Diagram


Specifications

SYMBOL PARAMETER Value UNIT
VCC Supply voltagee 0.5 to+ 7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Current ± 50 mA
ICC or IGND DC VCC or Ground Current ± 200 mA
Tstg Storage temperature 65 to 150

TL
Lead Temperature (10 sec) 300

AbsoluteMaximumRatingsarethose values beyond whichdamage to the device may occur. Functional operation under these condition isnot implied.


Description

The 74LVQ02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron  silicon gate and double-layer metal wiring C2MOStechnology. It is ideal for low power and low noise 3.3V applications.

The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output.

It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumption.

All inputs and outputs of the 74LVQ02 are equipped withprotection circuits against static discharge, giving them 2KV ESD immunity and transient excess ESD immunity and transient excess voltage.




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