Features: ` Wide supply voltage range from 1.65 V to 5.5 V` 5 V tolerant outputs for interfacing with 5 V logic` High noise immunity` Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V).` ESD protection: HBM EIA/JESD22-A114-B exceeds...
74LVC2G38: Features: ` Wide supply voltage range from 1.65 V to 5.5 V` 5 V tolerant outputs for interfacing with 5 V logic` High noise immunity` Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8...
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Symbol |
PARAMETER |
CONDITIONS |
MIN. |
MAX. |
Unit |
VCC |
supply voltage |
-0.5 |
+6.5 |
V | |
IIK |
input diode current | VI < 0 |
- |
-50 |
mA |
VI |
input voltage | note 1 |
-0.5 |
+6.5 |
V |
IOK |
output diode current | VO > VCC or VO < 0 |
- |
±50 |
mA |
VO |
output voltage | active mode; notes 1 and 2 |
-0.5 |
VCC + 0.5 |
V |
Power-down mode; notes 1 and 2 |
-0.5 |
+6.5 |
V | ||
IO |
output source or sink current | VO = 0 to VCC |
- |
±50 |
mA |
ICC, IGND |
VCC or GND current |
- |
±100 |
mA | |
Tstg |
Storage Temperature |
-65 |
+150 |
||
PD |
power dissipation |
Tamb = -40 to +125 |
- |
250 |
mW |
The 74LVC2G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
The 74LVC2G38 is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
The 74LVC2G38 provides the 2-input NAND function. The outputs of the 74LVC2G38 devices are open drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions.