Features: 5 volt tolerant inputs/outputs for interfacing with 5V logicWide supply voltage range of 1.2V to 3.6VComplies with JEDEC standard no. 8-1ACMOS low power consumptionMULTIBYTETM flow-through standard pin-out architectureLow inductance multiple power and ground pins for minimum noise and gr...
74LVC16240A: Features: 5 volt tolerant inputs/outputs for interfacing with 5V logicWide supply voltage range of 1.2V to 3.6VComplies with JEDEC standard no. 8-1ACMOS low power consumptionMULTIBYTETM flow-through...
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SYMBOL | PARAMETER | CONDITIONS | LIMITS | UNIT | |
MIN | MAX | ||||
VCC | DC supply voltage | 0.5 | +6.5 | V | |
IIK | DC input diode current | VI < 0 |
50 | mA | |
VI | DC input voltage | Note 2 | 0.5 | +6.5 | V |
IOK | DC output diode current | VO > VCC or VO < 0 |
50 |
mA | |
VO | DC output voltage; output HIGH or LOW state |
Note 2 | 0.5 | VCC+ 0.5 |
V |
VO | DC output voltage; output 3-State | Note 2 | 0.5 | 6.5 | V |
IO | DC output source or sink current | VO = 0 to VCC |
50 |
mA | |
IGND , ICC |
DC V or GND current | 100 |
mA | ||
Tstg | Storage temperature rangeg | 65 | +150 | ||
Ptot | Power dissipation per package SO package SSOP and TSSOP package |
Above +70 derate linearly 8mW/K Above +60 derate linearly 5.5mW/K |
500 500 |
mA |
The 74LVC16240A is a high-performance, low-power, low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5 devices. In 3-State operation, outputs can handle 5V. These features allow the use of these devices in a mixed 3.3V/5V environment.
The 74LVC16240A is a 16-bit inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs tassume a high impedance OFF-state. The 74LVC16240A is identical to the 74LVC16244A but has inverting outputs.