74LVC157A

Features: •Wide supply voltage range of 1.2 to 3.6 V•In accordance with JEDEC standard no. 8-1A•CMOS lower power consumption•Direct interface with TTL levels•5 Volt tolerant inputs, for interfacing with 5 Volt logicPinoutSpecifications SYMBOL PARAMETER CONDITIO...

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SeekIC No. : 004251216 Detail

74LVC157A: Features: •Wide supply voltage range of 1.2 to 3.6 V•In accordance with JEDEC standard no. 8-1A•CMOS lower power consumption•Direct interface with TTL levels•5 Volt tol...

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Part Number:
74LVC157A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

•Wide supply voltage range of 1.2 to 3.6 V
•In accordance with JEDEC standard no. 8-1A
•CMOS lower power consumption
•Direct interface with TTL levels
•5 Volt tolerant inputs, for interfacing with 5 Volt logic



Pinout

  Connection Diagram


Specifications

SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage   0.5 to +6.5 V
IIK DC input diode current V1<0 50 mA
V1 DC input voltage Note 2 0.5 to +5.5 V
IOK DC output diode current VO>VCC or VO<O ±50 mA
VO DC output voltage Note 2 0.5 to VCC +0.5 V
IO DC output diode current VO = 0 to VCC ±50 mA
IGND, ICC DC VCC or GND current   ±100 mA
Tstg Storage temperature range   65 to +150 °C
PTOT Power dissipation per package
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
500
500
mW



Description

The 74LVC157A is a high-performance, low-power, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment.

The 74LVC157A is a quad 2-input multiplexer which select 4 bits of data from two sources under the control of a common data select input (S). The four outputs present the selected data in the true (non-inverted) form. The enable input (E</a>) is active LOW. When E</a> is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74LV157. The state of the common data select input (S) determines the particular register of the 74LVC157A from which the data comes. It can also be used as function generator.

The 74LVC157A is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common.

The 74LVC157A is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S.




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