Features: •Asynchronous operation•4-Bit transceivers•3 additional buffer/driver lines•TTL compatible inputs•ESD protection exceeds 1000V per MIL STD 883 Method 3015 and 200V per Machine Model•Input Hysteresis•Low Noise Operation•Center Pin VCC& G...
74LVC1284: Features: •Asynchronous operation•4-Bit transceivers•3 additional buffer/driver lines•TTL compatible inputs•ESD protection exceeds 1000V per MIL STD 883 Method 3015 and...
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SYMBOL | PARAMETER | CONDITIONS | RATING | UNIT |
ESD Immunity, per Mil Std 883C method 3015 | ±2 | KV | ||
VCC | DC supply voltage | 0.5 to +4.6 | V | |
IIK | DC input diode current | V1 < 0 | ±20 | mA |
IOK | DC output diode current | VO < 0 | ±50 | mA |
VIN | DC input voltage3 | 0.5 to +5.5 | V | |
VOUT B/YDC | DC output voltage on B/Y side3 | 0.5 to +5.5 | V | |
VOUT B/Y(tr) | Transient output voltage on B/Y side4 | 40ns transient | 2 to +7 | V |
VOUT A side | DC output voltage on A side | 0.5 to VCC+0.5 | V | |
IO | DC output current | Outputs in High or Low state | ±50 | mA |
Tstg | Storage temperature range | 60 to 150 | °C | |
ICC/IGND | Continuous current through VCC or GND | ±200 | mA |
The 74LVC1284 parallel interface chip is designed to provide an asynchronous, 4-bit, bi-directional, parallel printer interface for personal computers. Three additional lines are included to provide handshaking signals between the host and the peripheral. The part is designed to match IEEE 1284 standard.
The 4 transceiver pins (A/B 1-4) of the 74LVC1284 allow data transmission from the A bus to the B bus, or from the B bus to the A bus, depending on the state of the direction pin DIR.
The B bus and the Y5-Y7 lines of the 74LVC1284 have totem pole or open drain style outputs depending on the state of the high drive enable pin HD. The A bus only has totem pole style outputs. All inputs are TTL compatible with at least 300mV of input hysteresis at VCC = 3.3V.