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74LVC125A

Features: • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic• Supply voltage range of 1.2V to 3.6V• Complies with JEDEC standard no. 8-1A• CMOS low power consumption• Direct interface with TTL levels• High impedance when VCC = 0VPinoutSpecificat...

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74LVC125A: Features: • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic• Supply voltage range of 1.2V to 3.6V• Complies with JEDEC standard no. 8-1A• CMOS low power con...

74LVC125A Data Sheet

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Part Number:
74LVC125A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Supply voltage range of 1.2V to 3.6V
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
• Direct interface with TTL levels
• High impedance when VCC = 0V


Pinout

Connection Diagram


Specifications

SYMBOL                  PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage   0.5 to +6.5 V
IIK DC input diode current VI<0 50 mA
VI DC input voltage Note 2 0.5 to +6.5 V
IOK DC output diode current VO >VCC or VO < 0 ±50 mA
VO DC output voltage; output HIGH or LOW state Note 2 0.5 to VCC +0.5 V
DC output voltage; output 3-State Note 2 0.5 to 6.5
IOUT DC output source or sink current VO = 0 to VCC ±50 mA
IGND, ICC DC VCC or GND current   ±100 mA
Tstg Storage temperature range   65 to +150
PTOT Power dissipation per package
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)		 above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K		 500
500		 mW



Description

The 74LVC125A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3V or 5.0V devices. In 3-state operation, outputs can handle 5V.

The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high impedance OFF-state.




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