Flip Flops 3.3V DUAL JK SET RESET POS
74LVC109PW,112: Flip Flops 3.3V DUAL JK SET RESET POS
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Number of Circuits : | 2 | Logic Family : | LVC | ||
Logic Type : | J-K Positive Edge Triggered Flip Flop | Polarity : | Inverting/Non-Inverting | ||
Input Type : | Single-Ended | Propagation Delay Time : | 4 ns at 3.3 V | ||
High Level Output Current : | - 24 mA | Supply Voltage - Max : | 3.6 V | ||
Maximum Operating Temperature : | + 125 C | Mounting Style : | SMD/SMT | ||
Package / Case : | SOT-403 | Packaging : | Tube |
Technical/Catalog Information | 74LVC109PW,112 |
Vendor | NXP Semiconductors |
Category | Integrated Circuits (ICs) |
Mounting Type | Surface Mount |
Package / Case | 16-TSSOP |
Function | Set and Reset |
Number of Bits per Element | 1 |
Number of Elements | 2 - Dual |
Current - Output High, Low | 24mA, 24mA |
Output Type | Differential |
Trigger Type | Positive Edge |
Type | JK Type |
Packaging | Tube |
Operating Temperature | -40°C ~ 125°C |
Delay Time - Propagation | - |
Frequency - Clock | 150MHz |
Voltage - Supply | 2.7 V ~ 3.6 V |
Drawing Number | 568; SOT403; ; |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | 74LVC109PW,112 74LVC109PW,112 |