Features: · 5 V tolerant inputs and outputs (open drain) for interfacing with 5 V logic· Wide supply voltage range from 1.65 to 5.5 V· CMOS low power consumption· Direct interface with TTL levels· Inputs accept voltages up to 5 V· Complies with JEDEC standard no. 8-1A.PinoutSpecifications S...
74LVC06A: Features: · 5 V tolerant inputs and outputs (open drain) for interfacing with 5 V logic· Wide supply voltage range from 1.65 to 5.5 V· CMOS low power consumption· Direct interface with TTL levels· I...
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SYMBOL | PARAMETER | CONDITIONS | MIN. | MAX. | UNIT |
VCC | DC supply voltage | -0.5 | +6.5 | V | |
IIK | DC input diode current | VI <0 | - | -50 | mA |
VI | DC input voltage | note 1 | -0.5 | +6.5 | V |
IOK | DC output clamping diode current | VO <0 | - | -50 | mA |
VO | DC output voltage | active mode; note 1 | -0.5 | VCC + 0.5 | V |
high-impedance mode; note 1 |
-0.5 | +6.5 | V | ||
LO | DC output sink current | VO = 0 to VCC | - | 50 | mA |
ICC, IGND | DC VCC or GND current | - | ±100 | mA | |
Tstg | storage temperature | -65 | ±150 | °C | |
Ptot | power dissipation per package SO package TSSOP package |
above 70 °C derate linearly with 8 mW/K above 60 °C derate linearly with 5.5 mW/K |
- - |
500 500 |
mW mW |
The 74LVC06A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 to 5 V environment.
The 74LVC06A provides six inverting buffers.
The outputs of the 74LVC06A devices are open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.