74LV574N

Output Type :
Low Level Output Current :
Number of Circuits : 1
Maximum Operating Temperature : + 125 C
Supply Voltage - Max : 5.5 V
Polarity : Non-Inverting
Input Type : Single-Ended
Mounting Style : Through Hole
Packaging : Tube
High Level Output Current : - 16 mA
Package / Case : DIP-20
Logic Type : D-Type Edge Triggered Flip-Flop
Logic Family : LV
Propagation Delay Time : 13 ns at 3.3 V


Description

The 74LV574N belongs to 74LV574 family. The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of the eight flip-flops is available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. The 74LV574 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT574. The 74LV574 is an octal D-type flip±flop featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops.

The features of 74LV574N can be summarized as (1)optimized for low voltage applications: 1.0 to 3.6V; (2)accepts TTL input levels between VCC = 2.7V and VCC = 3.6V; (3)typical VOLP (output ground bounce) <0.8V @ VCC = 3.3V, Tamb = 25°C; (4)typical VOHV (output VOH undershoot) <2V @ VCC = 3.3V, Tamb = 25°C; (5)common 3-state output enable input; (6)output capability: bus driver; (7)ICC category: MSI; (8)wide operating voltage: 1.0 to 5.5V.

The absolute maximum ratings of 74LV574N are (1)VCC DC supply voltage: -0.5 to +7.0 V; (2)±IIK DC input diode current(VI < -0.5 or VI > VCC + 0.5V): 20mA; (3)±IOK DC output diode current(VO < -0.5 or VO > VCC + 0.5V): 50mA; (4)±IO DC output source or sink current -bus driver outputs(-0.5V < VO < VCC + 0.5V): 35mA; (5)±IGND, ±ICC DC VCC or GND current for types with bus driver outputs: 70mA; (6)Tstg storage temperature range: -65 to +150 °C; (7)power dissipation per package for temperature range of the 74LV574N: -40 to +125°C-plastic DIL(above +70°C derate linearly with 12mW/K)/-plastic mini-pack (SO)(above +70°C derate linearly with 8 mW/K)/-plastic shrink mini-pack (SSOP and TSSOP)(above +60°C derate linearly with 5.5 mW/K): 750/500/400mW.(1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the 74LV574N at these or any other conditions beyond those indicated under are commended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.)