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74LV574

Features: • Wide operating voltage: 1.0 to 5.5V• Optimized for Low Voltage applications: 1.0 to 3.6V• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V• Typical VOLP (output ground bounce)  0.8V at VCC = 3.3V amb = 25°C• Typical VOHV (output VOH undershoot) ...

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SeekIC No. : 004251186 Detail

74LV574: Features: • Wide operating voltage: 1.0 to 5.5V• Optimized for Low Voltage applications: 1.0 to 3.6V• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V• Typical VOLP...

74LV574 Data Sheet

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Part Number:
74LV574
Supply Ability:
5000

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  • 1~5000
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  • Processing time
  • 15 Days
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Product Details

Description



Features:

• Wide operating voltage: 1.0 to 5.5V
• Optimized for Low Voltage applications: 1.0 to 3.6V
• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
• Typical VOLP (output ground bounce)  0.8V at VCC = 3.3V  amb = 25°C
• Typical VOHV (output VOH undershoot)  2V at VCC = 3.3V, Tamb = 25°C
• Common 3-State output enable input
• Output capability: bus driver
• ICC category: MSI


Pinout

Connection Diagram


Specifications

In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage   0.5 to +7.0 V
±IIK DC input diode current VI < 0.5 or VI > VCC + 0.5V 20 mA
±IOK DC output diode current VO < 0.5 or VO > VCC + 0.5V 50 mA
±IO DC output source or sink current
standard outputs		 0.5V < VO < VCC + 0.5V 25 mA
±IGND,
±ICC		 DC VCC or GND current for types with
standard outputs		   50 mA
Tstg Storage temperature range   65 to +150 °C
PTOT Power dissipation per package
plastic DIL
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)		 for temperature range: 40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K		 750
500
400		 mW

NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.


Description

The 74LV574 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT574.

The 74LV574 is an octal D-type flipflop featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops.

The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition.

WhenOE is LOW, the contents of the eight flip-flops of the 74LV574 is available at the outputs. WhenOE is HIGH, the outputs go to the high impedance OFF-state.  peration of theOE input does not affect the state of the flip-flops.




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