Latches OCTAL TRANSPARANT LATCH
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Number of Circuits : | 8 | Logic Type : | TTL |
Logic Family : | LV | Polarity : | Non-Inverting |
Number of Output Lines : | 8 | High Level Output Current : | - 16 mA |
Propagation Delay Time : | 12 ns at 3.3 V | Supply Voltage - Max : | 5.5 V |
Supply Voltage - Min : | 1 V | Maximum Operating Temperature : | + 125 C |
Minimum Operating Temperature : | - 40 C | Package / Case : | PDIP-20 |
Packaging : | Tube |
The 74LV573N belongs to 74LV573 family which is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT573. The 74LV573 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all internal latches. The '573' consists of eight D-type transparent latches with 3-State true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the eight latches are available at the outputs. When OE is HIGH, the outputs of the 74LV573N go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latches. The '573' is functionally identical to the '563' and the '373', but the '563' has inverted outputs and the '373' has a different pin arrangement.
The features of 74LV573N can be summarized as (1)wide operating voltage: 1.0 to 5.5V; (2)optimized for low voltage applications: 1.0V to 3.6V; (3)accepts TTL input levels between VCC = 2.7V and VCC = 3.6V; (4)typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, Tamb = 25°C; (5)typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, Tamb = 25°C; (6)inputs and outputs on opposite sides of package allowing easy interface with microprocessors; (7)output capability: bus driver; (8)ICC category: MSI; (9)useful as input or output port for microprocessors/microcomputer; (10)common 3-State output enable input.
The absolute maximum ratings of 74LV573N are (1)VCC DC supply voltage: -0.5 to +7.0 V; (2)±IIK DC input diode current(VI < ±0.5 or VI > VCC + 0.5V): 20mA; (3)±IOK DC output diode current(VO < ±0.5 or VO > VCC + 0.5V): 50mA; (4)±IO DC output source or sink current-bus driver outputs(-0.5V < VO < VCC + 0.5V): 35mA; (5)±IGND, ±ICC DC VCC or GND current for types with-bus driver outputs: 70mA; (6)Tstg storage temperature range: -65 to +150 °C; (7)power dissipation per package(for temperature range of the 74LV573N: -40 to +125°C); (8)Ptot-plastic DIL(above +70°C derate linearly with 12mW/K)/ -plastic mini-pack (SO)(above +70°C derate linearly with 8 mW/K 500/)/-plastic shrink mini-pack (SSOP and TSSOP)(above +60°C derate linearly with 5.5 mW/K): 750/500/400mW.(1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the; (9)device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings of the 74LV573N may be exceeded if the input and output current ratings are observed.)