Features: • Wide operating voltage: 1.0 to 5.5 V• Optimized for Low Voltage applications: 1.0 to 3.6 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,Tamb = 25C.• Typical VOHV (output VOH u...
74LV4060: Features: • Wide operating voltage: 1.0 to 5.5 V• Optimized for Low Voltage applications: 1.0 to 3.6 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Typical ...
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SYMBOL | PARAMETER | CONDITIONS | RATING | UNIT |
VCC | DC supply voltage | 0.5 to +7.0 | V | |
±IIK | DC input diode current | VI < 0.5 or VI > VCC+ 0.5V | 20 | mA |
±IOK | DC output diode current | VO < 0.5 or VO > VCC + 0.5V | 50 | mA |
±IO | DC output source or sink current standard outputs |
0.5V < VO < VCC + 0.5V | 25 | mA |
±IGND, ±ICC |
DC VCC or GND current for types with standard outputs |
50 | mA | |
Tstg | Storage temperature range | 65 to +150 | °C | |
PTOT | Power dissipation per package plastic DIL plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP) |
for temperature range: 40 to +125°C above +70°C derate linearly with 12mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K |
750 500 400 |
mW |
The 74LV4060 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT4060.
The 74LV4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding
asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating.The counter of the 74LV4060 advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of the other input conditions.