74LV4053

Features: • Optimized for low voltage applications: 1.0 to 6.0 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Low typ ON resistance: 100 at Vcc VEE = 4.5 V 150 at Vcc VEE = 3.0 V 240 at Vcc VEE = 2.0 V• Logic level translation: to enable 3 V logic ...

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74LV4053 Picture
SeekIC No. : 004251176 Detail

74LV4053: Features: • Optimized for low voltage applications: 1.0 to 6.0 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Low typ ON resistance: 100 at Vcc VEE = 4.5 V 15...

floor Price/Ceiling Price

Part Number:
74LV4053
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Optimized for low voltage applications: 1.0 to 6.0 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Low typ "ON" resistance:
   100 at Vcc VEE = 4.5 V
   150 at Vcc VEE = 3.0 V
   240 at Vcc VEE = 2.0 V
• Logic level translation: to enable 3 V logic to communicate with ± 3 V analog signals
• Typical "break before make" built in
• Output capability: non-standard
• ICC category: MSI



Pinout

  Connection Diagram


Specifications

SYMBOL PARAMETER
CONDITIONS
RATING
Unit
VCC DC supply voltage
0.5 to +7.0
V
±IIK DC input diode current
VI < 0.5 or VI > VCC + 0.5V
20
mA
±ISK DC output diode current
VO < 0.5 or VO > VCC + 0.5V
20
mA
±IS DC switch current
0.5V < VO < VCC + 0.5V
25
mA
Tstg storage temperature range
65 to +150
PTOT Power dissipation per package
plastic DIL
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: 40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may  affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.



Description

The 74LV4053 is a low-voltage CMOS device and is pin and function compatible with the 74HC/HCT4053.

The 74LV4053 is a triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 to nY1), a common input/output (nZ) and three digital select inputs (S1 to S3).

With E LOW, one of the two switches is selected (low impedance ON-state) by S1 to S3 With E HIGH, all switches are in the high impedance OFF-states, independent of S1 and S3.

VCC and GND of the 74LV4053 are the supply voltage pins for the digital control inputs (S1, to S3, and E). The VCC to GND ranges are 1.0 to 6.0 V. The analog inputs/outputs (nY0, to nY1, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE s connected to GND (typically ground).




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