74LV273N

Flip Flops 3.3V D-TYPE W/RESET POS

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SeekIC No. : 00432785 Detail

74LV273N: Flip Flops 3.3V D-TYPE W/RESET POS

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Part Number:
74LV273N
Mfg:
NXP Semiconductors
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Quick Details

Number of Circuits : 1 Logic Family : LV
Logic Type : D-Type Edge Triggered Flip-Flop Polarity : Non-Inverting
Input Type : Single-Ended Propagation Delay Time : 12 ns at 3.3 V
High Level Output Current : - 12 mA Supply Voltage - Max : 5.5 V
Maximum Operating Temperature : + 125 C Mounting Style : Through Hole
Package / Case : DIP-20 Packaging : Tube    

Description

Output Type :
Low Level Output Current :
Number of Circuits : 1
Maximum Operating Temperature : + 125 C
Supply Voltage - Max : 5.5 V
Polarity : Non-Inverting
Input Type : Single-Ended
Mounting Style : Through Hole
Packaging : Tube
Package / Case : DIP-20
Logic Type : D-Type Edge Triggered Flip-Flop
High Level Output Current : - 12 mA
Logic Family : LV
Propagation Delay Time : 12 ns at 3.3 V


Description

The 74LV273N belongs to 74LV273 family which is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT273. The 74LV273 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements.

The features of 74LV273N can be summarized as (1)optimized for low voltage applications: 1.0 to 3.6V; (2)accepts TTL input levels between VCC = 2.7V and VCC = 3.6V; (3)typical VOLP (output ground bounce) <0.8V @ VCC = 3.3V, Tamb = 25°C; (4)typical VOHV (output VOH undershoot) <2V @ VCC = 3.3V, Tamb = 25°C; (5)ideal buffer for MOS microprocessor or memory; (6)common clock and master reset; (7)ICC category: MSI; (8)wide operating voltage: 1.0 to 5.5V.

The absolute maximum ratings of 74LV273N are (1)VCC DC supply voltage: -0.5 to +7.0 V; (2)±IIK DC input diode current(VI < -0.5 or VI > VCC + 0.5V): 20mA; (3)±IOK DC output diode current(VO < -0.5 or VO > VCC + 0.5V): 50mA; (4)±IO DC output source or sink current -bus driver outputs(-0.5V < VO < VCC + 0.5V): 25mA; (5)±IGND, ±ICC DC VCC or GND current for types with bus driver outputs: 50mA; (6)Tstg storage temperature range: -65 to +150 °C; (7)power dissipation per package for temperature range: -40 to +125°C-plastic DIL(above +70°C derate linearly with 12mW/K)/-plastic mini-pack (SO)(above +70°C derate linearly with 8 mW/K)/-plastic shrink mini-pack (SSOP and TSSOP)(above +60°C derate linearly with 5.5 mW/K): 750/500/400mW.(1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2.The input and output voltage ratings of the 74LV273N may be exceeded if the input and output current ratings are observed.)




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