74LV126

Features: • Wide operating voltage: 1.0 to 5.5 V• Optimized for low voltage applications: 1.0 to 3.6 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C• Typical VOHV (output VOH u...

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SeekIC No. : 004251132 Detail

74LV126: Features: • Wide operating voltage: 1.0 to 5.5 V• Optimized for low voltage applications: 1.0 to 3.6 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Typical ...

floor Price/Ceiling Price

Part Number:
74LV126
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

• Wide operating voltage: 1.0 to 5.5 V
• Optimized for low voltage applications: 1.0 to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C
• Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C
• Output capability: bus driver
• ICC category: MSI



Pinout

  Connection Diagram


Specifications

SYMBOL PTOT CONDITIONS RATING RATING
VCC DC supply voltage   0.5 to +7.0 V
±IIK DC input diode current VI < 0.5 or VI > VCC + 0.5V 20 mA
±IOK DC output diode current VO < 0.5 or VO > VCC + 0.5V 50 mA
±IO DC output source or sink current
bus driver outputs
0.5V < VO < VCC + 0.5V 35 mA
±IGND,
±ICC
DC VCC or GND current for types with
bus driver outputs
  70 mA
Tstg Storage temperature range   65 to +150 °C
PTOT Power dissipation per package
plastic DIL
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: 40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW

NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.




Description

The 74LV126 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT126.

The 74LV126 consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high impedance OFF-state.




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