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74LV125

Features: • Wide operating voltage: 1.0 to 5.5 V• Optimized for Low Voltage applications: 1.0 to 3.6 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C.• Typical VOHV (output VOH ...

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SeekIC No. : 004251130 Detail

74LV125: Features: • Wide operating voltage: 1.0 to 5.5 V• Optimized for Low Voltage applications: 1.0 to 3.6 V• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V• Typical ...

74LV125 Data Sheet

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Part Number:
74LV125
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Wide operating voltage: 1.0 to 5.5 V
• Optimized for Low Voltage applications: 1.0 to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C.
• Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C.
• Output capability: bus driver
• ICC category: MSI


Pinout

Connection Diagram


Specifications

In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage 0.5 to +7.0 V
±IIK DC input diode current VI < 0.5 or VI > VCC + 0.5V 20 mA
±IOK DC output diode current VO < 0.5 or VO > VCC + 0.5V 50 mA
±IO DC output source or sink current
standard outputs		 0.5V < VO < VCC + 0.5V 35 mA
±IGND,
±ICC		 DC VCC or GND current for types with
standard outputs		 70 mA
Tstg Storage temperature range 65 to +150 °C
PTOT Power dissipation per package
plastic DIL
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)		 for temperature range: 40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K		 750
500
400		 mW


NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.




Description

The 74LV125 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT125.

The 74LV125 consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high impedance OFF-state.




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