74LV109N

The 74LV109N belongs to 74LV109 family which is a dual positive-edge triggered JK-type flip-flop featuring individual J, K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs; also complementary Q and Q outputs. The 74LV109 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by tying the J and K inputs together. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

The features of 74LV109N can be summarized as (1)optimized for low voltage applications: 1.0 to 3.6V; (2)accepts TTL input levels between VCC = 2.7V and VCC = 3.6V; (3)typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, Tamb = 25°C; (4)typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, Tamb = 25°C; (5)output capability: standard; (6)ICC category: flip-flops.

The absolute maximum ratings of 74LV109N are (1)VCC DC supply voltage: -0.5 to +4.6 V; (2)±IIK DC input diode current(VI < -0.5 or VI > VCC + 0.5V): 20mA; (3)±IOK DC output diode current(VO < -0.5 or VO > VCC + 0.5V): 50mA; (4)±IO DC output source or sink current -bus driver outputs(-0.5V < VO < VCC + 0.5V): 25mA; (5)±IGND, ±ICC DC VCC or GND current for types with bus driver outputs: 50mA; (6)Tstg storage temperature range of the 74LV109N: -65 to +150 °C; (7)PTOT power dissipation per package for temperature range: -40 to +125°C-plastic DIL(above +70°C derate linearly with 12mW/K)/-plastic mini-pack (SO)(above +70°C derate linearly with 8 mW/K)/-plastic shrink mini-pack (SSOP and TSSOP)(above +60°C derate linearly with 5.5 mW/K): 750/500/400mW.(1. Stresses beyond those listed may cause permanent damage to the 74LV109N. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.)