74HCT9323A

The 74HCT9323A is high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT9323A is oscillators designed for quartz crystal combined with a programmable 3-State counter, a 3-State output buffer and an overriding asynchronous master reset (MR). With the two select inputs S1 and S2 the counter can be switched in the divide-1, 2, 4 or 8 mode. If left floating the clock is divided by 8. The oscillator is  esigned to operate either in the fundamental or third overtone mode depending on the crystal and external  ponents applied. On-chip capacitors minimize external component count for third overtone crystal applications.

The oscillator of the 74HCT9323A may be replaced by an external clock signal at input X1. In this event the other oscillator pin (X2) must be floating. The counter advances on the negative-going transition of X1. A LOW level on MR resets the counter, stops the oscillator and sets the output buffer in the 3-State condition. MR can be left floating since an internal pull-up resistor will make the MR inactive. In the HCT version, the MR input and the two mode select pins S1 and S2 are TTL compatible, but the X1 input has CMOS input switching levels and may be driven by a TTL output using a pull-up resistor of the 74HCT9323A connected to V_CC. QUICK REFERENCE