74HCT7731

The 74HCT7731 is high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT7731 is quad 64-bit static shift registers with a recycling mode. Each register has separate data inputs D_a to D_d, clock inputs CP_a to CP_d and data outputs Q_a to Q_d. Data shifts one place towards the output, each LOW to HIGH transition of the clock pulse. Each recycling mode input controls two registers REC_ab for registers A and B and REC_cd for registers C and D. When the REC input is HIGH, the 74HCT7731 is in the recycling mode and data at the output is shifted back into the input of the register, so after 64 clock pulses the contents of a register is again in its original position. This enables the user to tap off data from any position. When the REC input is LOW external data can be shifted in.