74HCT4515

The 74HCT4515 is high-speed Si-gate CMOS devices and are pin compatible with "4515" of the "4000B" series. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT4515 is 4-to-16 line decoders/demultiplexers having four binary weighted address inputs (A₀ to A₃) with latches, a latch enable input (LE), and an active LOW enable input (E). The 16 inverting outputs (Q₀ to Q₁₅) are mutually exclusive active LOW. When LE is HIGH, the selected output is determined by the data on A_n. When LE goes LOW, the last data present at A_n are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is LOW. When E is HIGH, all outputs are HIGH. The enable input (E) of the 74HCT4515 does not affect the state of the latch.

When the "4515" is used as a demultiplexer, E is the data input and A₀ to A₃ are the address inputs.