74HCT4511

The 74HCT4511 is high-speed Si-gate CMOS devices and are pin compatible with "4511" of the "4000B"
series. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT4511 is BCD to 7-segment latch/decoder/drivers with four address inputs (D₁ to D₄), an active LOW latch enable input (LE), an active LOWripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH segment outputs (Q_a to Q_g).

When LE of the 74HCT4511 is LOW, the state of the segment outputs (Q_a to Q_g) is determined by the data on D₁ to D₄. When LE goes HIGH, the last data present on D1 to D4 are stored in the latches and the segment outputs remain stable.

When LT of the 74HCT4511 is LOW, all the segment outputs are HIGH independent of all other input conditions. With LT HIGH, a LOW on BI forces all segment outputs LOW. The inputs LT and BI do not affect the latch circuit.