74HCT4351

The 74HCT4351 is high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT4351 is 8-channel analog multiplexers/demultiplexers with three select inputs (S₀ to S₂), two enable inputs (E1 and E2), a latch enable input (LE), eight independent inputs/outputs (Y₀ to Y₇) and a common input/output (Z).

With E₁ LOW and E₂ of the 74HCT4351 is HIGH, one of the eight switches is selected (low impedance ON-state) by S₀ to S₂. The data at the select inputs may be latched by using the active LOW latch enable input (LE). When LE is HIGH the latch is transparent. When either of the two enable inputs, E₁ (active LOW) and E₂ (active HIGH), is inactive, all 8 analog switches are turned off.

V_CC and GND of the 74HCT4351 are the supply voltage pins for the digital control inputs (S₀ to S₂, LE, E₁ and E₂). The V_CC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (Y₀ to Y₇, and Z) can swing between V_CC as a positive limit and V_EE as a negative limit.

V_CC - V_EE may not exceed 10.0 V.

For operation as a digital multiplexer/demultiplexer, V_EE is connected to GND (typically ground).