74HCT4094

The 74HCT4094 is high-speed Si-gate CMOS devices and are pin compatible with the "4094" of the "4000B" series. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT4094 is 8-stage serial shift registers having a storage latch associated with each stage for strobing data from the serial input (D) to the parallel buffered 3-state outputs (QP₀ to QP₇). The parallel outputs may be connected directly to common bus lines. Data is shifted on the positive-going clock (CP) transitions. The data in each shift register stage of the 74HCT4094 is transferred to the storage register when the strobe input (STR) is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) signal is HIGH.

Two serial outputs (QS₁ and QS₂) of the 74HCT4094 are available for cascading a number of "4094" devices. Data is available at QS₁ on the positive-going clock edges to allow high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information is available at QS₂ on the next negative-going clock edge and is for cascading "4094" devices when the clock rise time is slow.