74HCT4040

The 74HCT4040 is high-speed Si-gate CMOS devices and are pin compatible with "4040" of the "4000B"series. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT4040 is 12-stage binary ripple counters with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs(Q₀ to Q₁₁). The counter advances on the HIGH-to-LOW transition of CP.

A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP.

Each counter stage of the 74HCT4040 is a static toggle flip-flop.