74HC7403

The 74HC7403 is high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no.7A.

The "7403" is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 4 bits. A guaranteed 15 MHz data-rate makes it ideal for high-speed applications. A higher data-rate can be obtained in applications where the status flags are not used (burst-mode).

With separate pf the 74HC7403 controls for shift-in (SI) and shift-out (SO), reading and writing operations are completely independent, allowing synchronous and asynchronous data transfers.

Additional controls of the 74HC7403 include a master-reset input (MR), an output enable input (OE) and flags. The data-in-ready (DIR) and data-out-ready (DOR) flags indicate the status of the device.