74HC574D

Flip Flops OCTAL D F/F POS-EDGE 3STATE

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74HC574D Picture
SeekIC No. : 00431635 Detail

74HC574D: Flip Flops OCTAL D F/F POS-EDGE 3STATE

floor Price/Ceiling Price

Part Number:
74HC574D
Mfg:
NXP Semiconductors
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/16

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Product Details

Quick Details

Number of Circuits : 8 Logic Family : 74HC
Logic Type : CMOS Polarity : Non-Inverting
Input Type : Single-Ended Output Type : Single-Ended
Propagation Delay Time : 150 ns High Level Output Current : - 7.8 mA
Low Level Output Current : 7.8 mA Supply Voltage - Max : 6 V
Maximum Operating Temperature : + 125 C Mounting Style : SMD/SMT
Package / Case : SOT-163 Packaging : Tube    

Description

Maximum Operating Temperature : + 125 C
Mounting Style : SMD/SMT
Logic Type : CMOS
Polarity : Non-Inverting
Input Type : Single-Ended
Output Type : Single-Ended
Packaging : Tube
Number of Circuits : 8
Logic Family : 74HC
High Level Output Current : - 7.8 mA
Low Level Output Current : 7.8 mA
Supply Voltage - Max : 6 V
Package / Case : SOT-163
Propagation Delay Time : 150 ns


Pinout

  Connection Diagram


Description

The 74HC574D belongs to the 74HC574 series. It is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL(LSTTL). It is available in the plastic SOT146 package. It can be used in serial-to-parallel data conversion and remote control holding register.

There are some features of the 74HC574D as follows. (1) 3-state non-invertering outputs for bus oriented applications; (2) 8-bit positive edge-triggered register; (3) common 3-state output enable input; (4) independent register and 3-state buffer operation; (5) bus drive output capability; (6) MSI ICC category.

Then is some information about the operating characters of the 74HC574D. (1): propagation delay is 14 ns at the condition of CL is 15 pF and VCC is 5 V; (2): maximum clock frequency is 123 MHz; (3): input capacitance (CI) is 3.5 pF; (4): power dissipation capacitance per flip-flop (CPD) is 22 pF for notes 1 and notes 2; (5): the typical hold time is 0 ns and the minimum is 5 ns when Tamb is 25 ,and is 5 ns for the minimum when Tamb is from -40 to 85 ; (6): the typical maximum clock pulse frequency is 37 MHz and the minimum is 6.0 MHz at Tamb is 25 ,and is 4.8 MHz at Tamb is from -40 to 85 . If you want more about the 74HC574D, please download the datasheet at www.seekic.com.




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