74HC393D

The 74HC393D is a type of high-speed si-gate CMOS devices,which is specified in compliance with JEDEC standard no. 7A. 74HC393D is a 4-bit binary ripple which is differnt from separate clocks (1CP and 2 CP) and master reset (1MR and 2MR) inputs to each counter. The operation of each half of the "393" is similar with the "93" except no external clock connections are required. The counters of the 74HC393D are triggered by a HIGH-to-LOW exchange of the clock inputs. The counter outputs are internally connected to offer clock inputs to succeeding stages. The outputs of the ripple counter do not change synchronously and should not be applied to high-speed address decoding.

It has some unique features of the 74HC393D shown below: (1)Two 4-bit binary counters with individual clocks;(2)Divide-by any binary module up to 28 in one package;(3)Two master resets to clear each 4-bit counter individually;(4)Output capability is standard;(5)ICC category is MSI.

The 74HC393D has the following quick reference data(GND=0 V; Tamb=25; tr=tf=6 ns)(1): propagation delay:nCP to nQ0 is 12 ns typ, nQ to nQn+1 is 5 ns typ and nMR to nQn is 11 ns typ when CL is 15 pF and VCC is 5 V;(2)maximum clock frequency is 99 MHZ typ;(3):input capacitance is 3.5pF;(4)power dissipation capacitance per counter is 23 pF.