74HC2G125

Features:

· Wide supply voltage range from 2.0 to 6.0 V
· Symmetrical output impedance
· High noise immunity
· Low power dissipation
· Balanced propagation delays
· Very small 8 pins package
· Output capability: bus driver
· ESD protection:
  HBM EIA/JESD22-A114-A exceeds 2000 V
  MM EIA/JESD22-A115-A exceeds 200 V.
· Specified from -40 to +85 °C and -40 to +125 °C.


Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VCC	supply voltage		-0.5	+7.0	V
IIK	input diode current	VI < -0.5 V or VI > VCC + 0.5 V ;note 1	-	±20	mA
IOK	output diode current	VO < -0.5 V or VO > VCC + 0.5 V ;note 1	-	±20	mA
IO	output source or sink current	-0.5 V < VO < VCC + 0.5 V ;note 1	-	25	mA
ICC	VCC or GND current	note 1	-	50	mA
Tstg	storage temperature		-65	+150	°C
PD	power dissipation per package	for temperature range from -40 to +125 °C; note 2	-	300	mW

Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 110 °C the value of P_Dderates linearly with 8 mW/K.


Description

The 74HC2G125 is a high-speed Si-gate CMOS device.

The 74HC2G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input pin (OE). A HIGH at pin OE causes the output to assume a high-impedance OFF-state.

The bus driver output currents are equal compared to the 74HC2G125.