Features: ` Pulse width variance is typically less than ± 5%` Pin-out identical to 123 ` Overriding reset terminates output pulse` nB inputs have hysteresis for improved noise immunity` Output capability: standard (except for nREXT/CEXT)` ICC category: MSIPinoutDescriptionThe 74HC221 is high-spee...
74HC221: Features: ` Pulse width variance is typically less than ± 5%` Pin-out identical to 123 ` Overriding reset terminates output pulse` nB inputs have hysteresis for improved noise immunity` Output capa...
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Features: · Output capability: standard· ICC category: SSIPinoutDescription The 74HC/HCT02 are hig...
Features: · Level shift capability· Output capability: standard (open drain)· ICC category: SSIPin...
The 74HC221 is high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC221 is dual non-retriggerable monostable multivibrators. Each multivibrator features an active LOW-going edge input (nA) and an active HIGH-going edge input (nB), either of which can be used as an enable input.
Pulse triggering of the 74HC221 occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt-trigger input circuitry for the nB inputs allow jitter-free triggering from inputs with slow transition rates,providing the circuit with excellent noise immunity.
Once triggered, the outputs (nQ, nQ) of the 74HC221 are independent of further transitions of nA and nB inputs and are a function of the timing components. The output pulses can be terminated by the overriding active LOW reset inputs (nRD). Input pulses of the 74HC221 may be of any duration relative to the output pulse.
Pulse width stability of the 74HC221 is achieved through internal compensation and is virtually independent of VCC and temperature. In most applications pulse stability will only be limited by the accuracy of the external timing components.