Features: •Equivalent to AMD's Am29833 bipolar parity bus transceiver in pinout/function, speed and output drive over full temperature and voltage supply extremes•High-speed bidirectional bus transceiver for processororganized devices•IDT54/74FCT833A equivalent to Am29833A speed ...
74FCT833A: Features: •Equivalent to AMD's Am29833 bipolar parity bus transceiver in pinout/function, speed and output drive over full temperature and voltage supply extremes•High-speed bidirectiona...
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Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
•Equivalent to AMD's Am29833 bipolar parity bus
transceiver in pinout/function, speed and output drive
over full temperature and voltage supply extremes
•High-speed bidirectional bus transceiver for processororganized devices
•IDT54/74FCT833A equivalent to Am29833A speed and output drive
•IDT54/74FCT833B 30% faster than Am29833A
•Buffered direction and three-state controls
•Error flag with open-drain output
•IOL = 48mA (commercial) and 32mA (military)
•TTL input and output level compatible
•CMOS output level compatible
•Substantially lower input current levels than AMD's bipolar Am29800 series (5mA max.)
•Available in plastic DIP, CERDIP, LCC and SOIC
•Product available in Radiation Tolerant and Radiation Enhanced versions
•Military product compliant to MIL-STD-883, Class B
Symbol | Rating | Commercial | Military | Unit |
VTERM(2) | TerminalVoltagewith Respectto GND | 0.5 to+7.0 | 0.5to+7.0 | V |
VTERM(3) | Terminal Voltagewith Respectto GND | 0.5 to VCC | 0.5 to VCC | V |
TA | OperatingTemperature | 0 to +70 | 55 to +125 | |
TBIAS | TemperatureUnder Bias | 55 to +125 | 65 to +135 | |
TSTG | StorageTemperature | 55 to +125 | 65 to +150 | |
PT | Power Dissipation | 0.5 | 0.5 | W |
IOUT | DC Output Current | 120 | 120 | mA |
The 74FCT833A is high-performance bus transceivers designed for two-way communications. They each contain an 8-bit data path from the R (port) to the T (port), an 8-bit data path from the T (port) to the R (port), and a 9-bit parity checker/generator. The error flag of the 74FCT833A can be clocked and stored in a register and read at the ERR output. The clear (CLR) input is used to clear the error flag register.
The output enables OETand OER of the 74FCT833A are used to force the port outputs to the high-impedance state so that the device can drive bus lines directly. In addition, OE R and OE T can be used to force a parity error by enabling both lines simultaneously. This transmission of inverted parity of the 74FCT833A gives the designer more system diagnostic capability. The 74FCT833A are specified at 48mA and 32mA output sink current over the commercial and military temperature ranges, respectively.