74FCT138CT

Features:

Std., A and C speed grades
Low input and output leakage ?1A (max.)
CMOS power levels
True TTL input and output compatibility
      V_OH = 3.3V (typ.)
      V_OL = 0.3V (typ.)
High drive outputs (-15mA IOH, 48mA IOL)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation Enhanced versions
Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked)
Available in DIP, SOIC, QSOP, CERPACK and LCC packages


Pinout




Specifications

Symbol	Rating	Commercial	Military	Unit
VTERM(2)	Terminal Voltage with Respect to GND	-0.5 to +7.	-0.5 to +7.0	V
VTERM(3)	Terminal Voltage with Respect to GND	-0.5 t VCC+0.5	-0.5 VCC +0.5	V
TA	Operating Temperature	0 to +70	-55 to +125
TBIAS	Temperature Under Bias	-55 to +12	-65 to +135
TSTG	Storage Temperature	-55 to +12	-65 to +150
PT	Power Dissipation	0.5	0.5	W
IOUT	DC Output Current	-60 to +120	-60 to +120	mA

Description

The 74FCT138CT are 1-of-8 decoders built using an advanced dual metal CMOS technology. The 74FCT138CT accepts three binary weighted inputs (A0,1, A2) and, when enabled, provides eight mutually exclusive A active LOW outputs (O₀-O₇). The 74FCT138CT features three enable inputs, two active LOW (E₁, E₂) and one active HIGH (E₃). All outputs will be HIGH unless E₁ and E₂ are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74FCT138CT devices and one inverter.