Features: • A, B, and C grades• Low input and output leakage 1A (max.)• CMOS power levels• True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.)• High Drive outputs (-15mA IOH, 48mA IOL)• Meets or exceeds JEDEC standard 18 specifications...
74FCT827CT: Features: • A, B, and C grades• Low input and output leakage 1A (max.)• CMOS power levels• True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.)̶...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
Symbol |
Description |
Max |
Unit |
VTERM(2) |
Terminal Voltage with Respect to GND |
0.5 to +7 |
V |
VTERM(3) |
Terminal Voltage with Respect to GND |
0.5 to VCC+0.5 |
V |
TSTG |
Storage Temperature |
65 to +150 |
°C |
IOUT |
DC Output Current |
60 to +120 |
mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
The 74FCT827CT is built using an advanced dual metal CMOS technology. The FCT827T 10-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. The 10- bit buffers of the 74FCT827CT have NAND-ed output enables for maximum control flexibility. All of the FCT827T high-performance interface family are designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes to ground and all outputs are designed for low-capacitance bus loading in high-impedance state.