Features: • IDT54FCT574A equivalent to FAST™ speed and drive• IDT54/74FCT574A up to 30% faster than FAST• IDT74FCT574C up to 50% faster than FAST• IOL = 48mA (commercial) and 32mA (military)• CMOS power levels (1mW typ. static)• Edge-triggered master/slave...
74FCT574A: Features: • IDT54FCT574A equivalent to FAST™ speed and drive• IDT54/74FCT574A up to 30% faster than FAST• IDT74FCT574C up to 50% faster than FAST• IOL = 48mA (commercia...
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Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
Symbol |
Description |
Commercial |
Military |
Unit |
VTERM(2) |
Terminal Voltage with Respect to GND |
0.5 to +7 |
0.5 to +7 |
V |
VTERM(3) |
Terminal Voltage with Respect to GND |
0.5 to +VCC |
0.5 to +VCC |
V |
TA |
Operating Temperature |
0 to +70 |
55 to +125 |
°C |
TBIAS |
Temperature under BIAS |
55 to +125 |
65 to +135 |
°C |
TSTG |
Storage Temperature |
55 to +125 |
65 to +150 |
°C |
PT |
Power Dissipation |
0.5 |
0.5 |
W |
IOUT |
DC Output Current |
120 |
120 |
mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
The 74FCT574A is an 8-bit register built using an advanced dual metal CMOS technology. These registers consist of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) is low, the eight outputs are enabled. When the OE input is high, the outputs of the 74FCT574A are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs of the 74FCT574A is transferred to the O outputs on the low-to-high transition of the clock input. The FCT574 has non-inverting outputs with respect to the data at the D inputs.