74FCT16841ET

Features: 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1A (max.) ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) Packages include 25 mil pitch ...

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SeekIC No. : 004250139 Detail

74FCT16841ET: Features: 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1A (max.) ESD > 2000V per MIL-S...

floor Price/Ceiling Price

Part Number:
74FCT16841ET
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40°C to +85°C
VCC = 5V ±10%
High drive outputs (-32mA IOH, 64mA IOL)
Power off disable outputs permit "live insertion"
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C



Pinout

  Connection Diagram




Specifications

Symbol

Description

Max.

Unit

VTERM(2)

Terminal Voltage with Respect to
GND

0.5 to +7.0

V

VTERM(3)

Terminal Voltage with Respect to
GND

0.5 to
VCC +0.5

V

TSTG

Storage Temperature

65 to +150

°C

IOUT

DC Output Current

60 to +120

mA


NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT



Description

The 74FCT16841ET 20-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 10-bit latches or one 20-bit latch. Flow-through organization of signal pins simplifies layout. All inputs  are designed with hysteresis for improved noise margin.

The 74FCT16841ET is ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane
drivers.

The 74FCT16841ET has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall  timesreducing the need for external series terminating resistors. The 74FCT16841ET is plug-in replacements for the FCT16841AT/BT/CT/ET and ABT16841 for on-board interface applications.




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