74FCT16823AT

Common features:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40 to +85
 VCC = 5V ±10%

The 74FCT16823AT 18-bit bus interface registers are built using advanced, dual metal CMOS technology. These high-speed, low-power registers with clock enable (xCLKEN ) and clear (xCLR ) controls are ideal for parity bus interfacing in high-performance synchronous systems. The control inputs are organized to operate the device as two 9-bit registers or one 18-bit register. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

The 74FCT16823AT is ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

The 74FCT16823AT has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT16823AT is plug-in replacements for the 74FCT16823AT for on-board interface applications.