74FCT162H272ET

The 74FCT162H272ET synchronous tri-port bus exchangers are high-speed, bidirectional,12-bit, registered, bus multiplexers for use in synchronous memory interleaving applications. All registers have a common clock and use a clock enable (CExxx) on each data register to control data sequencing. The output enables and mux select (OEA, OEBand SEL) are also under synchronous control allowing direction changes to be edge triggered events.

The tri-port bus exchanger of the 74FCT162H272ET has three 12-bit ports. Data may be transferred between the A port and either/both of the B ports. The clock enable (CE1B, CE2B, CEA1B and CEA2B) inputs control the data storage. Both B ports have a common output enable (OEB) to aid in synchronously loading the B registers from the B port.

The 74FCT162H272ET has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times-reducing the need for external series terminating resistors.

The 74FCT162H272ET has "Bus Hold" which retains the input's last state whenever the input goes to high impedance. This prevents "floating" inputs and eliminates the need for pull-up/down resistors.