74FCT162841AT/BT/CT

0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40°C to +85°C
V_CC = 5V ±10%
Balanced Output Drivers: ±24mA (commercial), ±16mA (military)
Reduced system switching noise
Typical V_OLP (Output Ground Bounce) < 0.6V at V_CC = 5V,T_A = 25°C

The 74FCT162841AT/BT/CT  20-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 10-bit latches or one 20-bit latch. Flow-through organization of signal pins simplifies layout. All inputs  are designed with hysteresis for improved noise margin.

The 74FCT162841AT/BT/CT are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane
drivers.

The 74FCT162841AT/BT/CT have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall  timesreducing the need for external series terminating resistors. The 74FCT162841AT/BT/CT are plug-in replacements for the FCT16841AT/BT/CT/ET and ABT16841 for on-board interface applications.