Features: * 0.5 MICRON CMOS Technology* Ideal for address line driving and clock distribution* 8 banks with 1:4 fanout and 3-state* Typical tSK(o) (Output Skew) < 500ps* Balanced Output Drivers: ±24mA (commercial), ±16mA (military)* Reduced system switching noise* ESD > 2000V per MIL-STD-883...
74FCT162344CT: Features: * 0.5 MICRON CMOS Technology* Ideal for address line driving and clock distribution* 8 banks with 1:4 fanout and 3-state* Typical tSK(o) (Output Skew) < 500ps* Balanced Output Drivers: ...
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Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
Features: Std., A and C speed gradesLow input and output leakage ?1A (max.)CMOS power levelsTrue T...
* 0.5 MICRON CMOS Technology
* Ideal for address line driving and clock distribution
* 8 banks with 1:4 fanout and 3-state
* Typical tSK(o) (Output Skew) < 500ps
* Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
* Reduced system switching noise
* ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
* Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
* Extended commercial range of -40°C to +85°C
* VCC = 5V ±10%
* Low input and output leakage 1A (max.)
Symbol | Description | Max. | Unit |
VTERM(2) | Terminal Voltage with Respect to GND |
0.5 to +7.0 | V |
VTERM(3) | Terminal Voltage with Respect to GND |
0.5 to VCC +0.5 | V |
TSTG | Storage Temperature | 65 to +150 | °C |
IOUT | DC Output Current | 60 to +120 | mA |
The 74FCT162344CT is a 1:4 address line driver built using advanced dual metal CMOS technology. This high- speed, low power device provides the ability to fanout to memory arrays. Eight banks, each with a fanout of 4, and 3-state control provide efficient address distribution. One or more banks may be used for clock distribution.
The 74FCT162344CT has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times reducing the need for external series terminating resistors. A large number of power and ground pins and TTL output swings also ensure reduced noise levels. All inputs are designed with hysteresis for improved noise margins.