56F8365

Features: • Up to 60 MIPS at 60MHz core frequency• DSP and MCU functionality in a unified, C-efficient architecture• 512KB Program Flash• 4KB Program RAM• 32KB Data Flash• 32KB Data RAM• 32KB Boot Flash• Up to two 6-channel PWM modules• Four 4-...

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56F8365 Picture
SeekIC No. : 004233803 Detail

56F8365: Features: • Up to 60 MIPS at 60MHz core frequency• DSP and MCU functionality in a unified, C-efficient architecture• 512KB Program Flash• 4KB Program RAM• 32KB Data Fla...

floor Price/Ceiling Price

Part Number:
56F8365
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Description



Features:

• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
   C-efficient architecture
• 512KB Program Flash
• 4KB Program RAM
• 32KB Data Flash
• 32KB Data RAM
• 32KB Boot Flash
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
• Up to two Quadrature Decoders
• Up to two FlexCAN modules
• Optional On-Chip Regulator
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interface (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP)/Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
   unobtrusive, real-time debugging
• Up to 49 GPIO lines
• 128-pin LQFP Package



Pinout

  Connection Diagram


Specifications

Characteristic Symbol Notes Min Max Unit
Supply Voltage VDD_IO   -0.3 4.0 V
ADC Supply Voltage VDDA_ADC,
VREFH
VREFH must be less than or
equal to VDDA_ADC
-0.3 4.0 V
Oscillator / PLL Supply Voltage VDDA_OSC_PLL   -0.3 4.0 V
Internal Logic Core Supply Voltage VDD_CORE OCR_DIS is High -0.3 3.0 V
Input Voltage (digital) VIN Pin Groups 1, 2, 5, 6, 9, 10 -0.3 6.0 V
Input Voltage (analog) VINA Pin Groups 11, 12, 13 -0.3 4.0 V
Output Voltage VOUT Pin Groups 1, 2, 3, 5, 6, 7, 8 -0.3 4.0
6.01
V
Output Voltage (open drain) VOD Pin Group 4 -0.3 6.0 V
Ambient Temperature (Automotive) TA   -40 125 °C
Ambient Temperature (Automotive) TA   -40 105 °C
Junction Temperature (Automotive) TJ   -40 150 °C
Junction Temperature (Industrial) TJ   -40 125 °C
Storage Temperature (Automotive) TSTG   -55 150 °C
Storage Temperature (Industrial) TSTG   -55 150 °C
Note: Pins in italics are NOT available in the 56F8165 device.
Pin Group 1: TXD0-1, RXD0-1, SS0, MISO0, MOSI0
Pin Group 2: PHASEA0, PHASEA1, PHASEB0, PHASEB1, INDEX0, INDEX1, HOME0, HOME1, ISB0-2, ISA0-2, TD2-3, TC0-1,
TDO, SCLK0
Pin Group 3: RSTO, TDO
Pin Group 4: CAN_TX
Pin Group 5: D0-15, GPIOD0-5
Pin Group 6: A8-15, GPIOB0-4, TD0-1
Pin Group 7: CLKO
Pin Group 8: PWMA0-5, PWMB0-5
Pin Group 9: IRQA, IRQB, RESET, EXTBOOT, TRST, TMS, TDI, CAN_RX, EMI_MODE, FAULTA0-3, FAULTB0-3
Pin Group 10: TCK
Pin Group 11: XTAL, EXTAL
Pin Group 12: ANA0-7, ANB0-7
Pin Group 13: OCR_DIS, CLKMODE



Description

The 56F8365 and 56F8165 are members of the 56800E core-based family of controllers. Each combines, on a single chip, the processing power of a Digital Signal Processor (DSP) and the functionality of a microcontroller with a flexible set of peripherals to create an extremely cost-effective solution. Because of their low cost, configuration flexibility, and compact program code, the 56F8365 and 56F8165 are well-suited for many applications. The 56F8365 include many peripherals that are especially useful for motion control, smart appliances, steppers, encoders, tachometers, limit switches, power supply and control, automotive control (56F8365 only), engine management, noise suppression, remote utility metering, industrial control for power, lighting, and automation applications.

The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and optimized instruction set of 56F8365 allow straightforward generation of efficient, compact DSP and control code. The instruction set is also highly efficient for C/C++ Compilers to enable rapid development of optimized control applications.

The 56F8365 and 56F8165 support program execution from internal memories. Two data operands can be accessed from the on-chip data RAM per instruction cycle. These 56F8365 also provide two external dedicated interrupt lines and up to 49 General Purpose Input/Output (GPIO) lines, depending on peripheral configuration.




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