56F8346

• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
   C-efficient architecture
• Access up to 1MB of off-chip program and data
   memory
• Chip Select Logic for glueless interface to ROM
   and SRAM
• 128KB of Program Flash
• 4KB of Program RAM
• 8KB of Data Flash
• 8KB of Data RAM
• 8KB of Boot Flash
• Two 6-channel PWM Modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
• Two Quadrature Decoders
• Optional On-Chip Regulator
• FlexCAN module
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
   unobtrusive, real-time debugging
• Up to 62 GPIO lines
• 144-pin LQFP Package

The 56F8346 is a member of the 56800E core-based family of hybrid controllers. It combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost, configuration flexibility, and compact program code, the 56F8346 is well-suited for many applications. The 56F8346 includes many peripherals that are especially useful for motion control, smart appliances, steppers, encoders, tachometers, limit switches, power supply and control, automotive control, engine management, noise suppression, remote utility metering, industrial control for power, lighting, and automation applications.

The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and optimized instruction set allow straightforward generation of efficient, compact DSP and control code. The instruction set of 56F8346 is also highly efficient for C/C++ Compilers to enable rapid development of optimized control applications.

The 56F8346 supports program execution from either internal or external memories. Two data operands can be accessed from the on-chip data RAM per instruction cycle. The 56F8346 also provides two external dedicated interrupt lines and up to 62 General Purpose Input/Output (GPIO) lines, depending on peripheral configuration.

The 56F8346 hybrid controller includes 128KB of Program Flash and 8KB of Data Flash (each programmable through the JTAG port) with 4KB of Program RAM and 8KB of Data RAM. It also supports program execution from external memory.

A total of 8KB of Boot Flash of 56F8346 is incorporated for easy customer-inclusion of field-programmable software routines that can be used to program the main Program and Data Flash memory areas. Both Program and Data Flash memories can be independently bulk erased or erased in pages. Program Flash page erase size of 56F8346 is 1KB. Boot and Data Flash page erase size is 512 bytes. The Boot Flash memory can also be either bulk or page erased.

A key application-specific feature of the 56F8346 is the inclusion of two Pulse Width Modulator (PWM) modules. These modules each incorporate three complementary, individually programmable PWM signal output pairs (each module is also capable of supporting six independent PWM functions, for a total of 12 PWM outputs) to enhance motor control functionality. Complementary operation permits programmable dead time insertion, distortion correction via current sensing by software, and separate top and bottom output polarity control. The up-counter value of 56F8346 is programmable to support a continuously variable PWM frequency. Edge-aligned and center-aligned synchronous pulse width control (0% to 100% modulation) is supported. The 56F8346 is capable of controlling most motor types: ACIM (AC Induction Motors); both BDC and BLDC (Brush and Brushless DC motors); SRM and VRM (Switched and Variable Reluctance Motors); and stepper motors. The PWMs incorporate fault protection and cycle-by-cycle current limiting with sufficient output drive capability to directly drive standard optoisolators. A "smoke-inhibit", write-once protection feature for key parameters is also included. A patented PWM waveform distortion correction circuit is also provided. Each PWM of 56F8346 is double-buffered and includes interrupt controls to permit integral reload rates to be programmable from 1 to 16. The PWM modules of 56F8346 provide reference outputs to synchronize the Analog-to-Digital Converters through two channels of Quad Timer C.

The 56F8346 incorporates two Quadrature Decoders capable of capturing all four transitions on the two-phase inputs, permitting generation of a number proportional to actual position. Speed computation capabilities accommodate both fast- and slow-moving shafts. An integrated watchdog timer in the Quadrature Decoder can be programmed with a time-out value to alert when no shaft motion is detected. Each input is filtered to ensure only true transitions are recorded.

This hybrid controller 56F8346 also provides a full set of standard programmable peripherals that include two Serial Communications Interfaces (SCIs); two Serial Peripheral Interfaces (SPIs); and four Quad Timers. Any of these interfaces of 56F8346 can be used as General Purpose Input/Outputs (GPIOs) if that function is not required. A Flex Controller Area Network (FlexCAN) interface (CAN Version 2.0 B-compliant) and an internal interrupt controller are a part of the 56F8346.