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40876

Features: True Dual-Ported memory cells which allow simultaneous access of the same memory locationHigh-speed access Commercial: 25/35/55ns (max.)Low-power operation IDT70V07SActive: 300mW (typ.)Standby: 3.3mW (typ.)IDT70V07LActive: 300mW (typ.)Standby: 660 mW (typ.) IDT70V07 easily expands data ...

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40876: Features: True Dual-Ported memory cells which allow simultaneous access of the same memory locationHigh-speed access Commercial: 25/35/55ns (max.)Low-power operation IDT70V07SActive: 300mW (typ.)St...

40876 Data Sheet

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Part Number:
40876
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/11

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Product Details

Description



Features:

True Dual-Ported memory cells which allow simultaneous access of the same memory location
High-speed access
Commercial: 25/35/55ns (max.)
Low-power operation
IDT70V07S
Active: 300mW (typ.)
Standby: 3.3mW (typ.)
IDT70V07L
Active: 300mW (typ.)
Standby: 660 mW (typ.)
IDT70V07 easily expands data bus width to 16 bits or more
using the Master/Slave select when cascading more than one device
M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling between ports
Fully asynchronous operation from either port
TTL-compatible, single 3.3V (±0.3V) power supply
Available in 68-pin PGA and PLCC, and a 80-pin TQFP


Pinout

Connection Diagram
NOTES:
1. All VCC pins must be connected to power supply.
2. All GND pins must be connected to ground.
3. J68-1 package body is approximately .95 in x .95 in x .17 in.
PN80-1 package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.


Specifications

Symbol
Rating
Commercial
& Industrial
Unit
VTERM
Terminal Voltage
with respect to GND
-0.5 to +7.0
V
VTER(2)
Terminal Voltage
-55 to +125
°C
TSTG
Temperature
Under Bias
-65 to +150
°C
IOUT
DC Output Current
50
mA

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 0.3V for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 0.3V.




Description

The IDT70V07 is a high-speed 32K x 8 Dual-Port Static RAM. The IDT70V07 is designed to be used as a stand-alone 256K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bitor- more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-bit or wider memory system applications results in full-speed, error-free operation without the need for additional




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