28F640J5

Features: High-Density Symmetrically-Blocked Architecture-64 128-Kbyte Erase Blocks (64 M)-32 128-Kbyte Erase Blocks (32 M)5 V VCC Operation-2.7 V I/O CapableConfigurable x8 or x16 I/O120 ns Read Access Time (32 M) 150 ns Read Access Time (64 M)Enhanced Data Protection Feat...

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SeekIC No. : 004218245 Detail

28F640J5: Features: High-Density Symmetrically-Blocked Architecture-64 128-Kbyte Erase Blocks (64 M)-32 128-Kbyte Erase Blocks (32 M)5 V VCC Operation-2.7 V I/O CapableConfigurable x8 ...

floor Price/Ceiling Price

Part Number:
28F640J5
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

High-Density Symmetrically-Blocked Architecture
-64 128-Kbyte Erase Blocks (64 M)
-32 128-Kbyte Erase Blocks (32 M)
5 V VCC Operation
-2.7 V I/O Capable
Configurable x8 or x16 I/O
120 ns Read Access Time (32 M)
   150 ns Read Access Time (64 M)
Enhanced Data Protection Features
-Absolute Protection with
   VPEN = GND
   -Flexible Block Locking
-Block Erase/Program Lockout during Power Transitions
Industry-Standard Packaging
-µBGA* Package, SSOP and TSOP
      Packages (32 M)
Cross-Compatible Command Support
 -Intel Basic Command Set
 -Common Flash Interface
 -Scaleable Command Set
32-Byte Write Buffer
 -6 µs per Byte Effective
       Programming Time
640,000 Total Erase Cycles (64 M)
   320,000 Total Erase Cycles (32 M)
-10,000 Erase Cycles per Block
Automation Suspend Options
 -Block Erase Suspend to Read
 -Block Erase Suspend to Program
System Performance Enhancements
-STS Status Output
Intel StrataFlash™ Memory Flash Technology



Pinout

  Connection Diagram




Specifications

Commercial Operating Temperature
     During Read, Block Erase, Program,
     and Lock-Bit Configuration ........... 0 °C to +70 °C(1)
     Temperature under Bias .............. 10 °C to +80 °C
Storage Temperature....................... 65 °C to +125 °C
Voltage On Any Pin (except RP#)
     ....................................................... 2.0 V to +7.0 V(2)
RP# Voltage with Respect to
     GND during Lock-Bit
     Configuration Operations........2.0 V to +14.0 V(2,3,4)
Output Short Circuit Current...............................100 mA(5)
 


Description

Capitalizing on two-bit-per-cell technology, Intel StrataFlash™ memory products provide 2X the bits in 1X the space. Offered in 64-Mbit (8-Mbyte) and 32-Mbit (4-Mbyte) densities, 28F640J5 are the first to bring reliable, two-bit-per-cell storage technology to the flash market.

Intel StrataFlash memory benefits include: more density in less space, lowest cost-per-bit NOR devices,support for code and data storage, and easy migration to future devices.

Using the same NOR-based ETOX™ technology as Intel's one-bit-per-cell products, 28F640J5 take advantage of 400 million units of manufacturing experience since 1988. As a result,Intel StrataFlash components are ideal for code or data applications where high density and low cost are required. Examples include networking, telecommunications,audio recording, and digital imaging.

By applying FlashFile™ memory family pinouts, Intel StrataFlash memory components allow easy design migrations from existing 28F016SA/SV, 28F032SA, and Word-Wide FlashFile memory devices (28F160S5 and 28F320S5).

28F640J5 deliver a new generation of forward-compatible software support. By using the Common Flash Interface (CFI) and the Scaleable Command Set (SCS), customers can take advantage of density upgrades and optimized write capabilities of future Intel StrataFlash memory devices.

Manufactured on Intel's 0.4 micron ETOX™ V process technology, 28F640J5 provides the highest levels of quality and reliability.


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