28C17A

Features:

•Fast Read Access Time-150 ns
•CMOS Technology for Low Power Dissipation
-30 mA Active
-100 µA Standby
•Fast Byte Write Time-200 µs or 1 ms
•Data Retention >200 years
•High Endurance - Minimum 10⁴ Erase/Write Cycles
•Automatic Write Operation
-Internal Control Timer
-Auto-Clear Before Write Operation
-On-Chip Address and Data Latches
•Data</a> Polling; Ready/Busy</a>
•Chip Clear Operation
•Enhanced Data Protection
-VCC Detector
-Pulse Filter
-Write Inhibit
•Electronic Signature for Device Identification
•5-Volt-Only Operation
•Organized 2Kx8 JEDEC Standard Pinout
-28 Pin Dual-In-Line Package
-32-Pin PLCC Package
-28-Pin Thin Small Outline Package (TSOP) 8x20mm
-28-Pin Very Small Outline Package (VSOP) 8x13.4mm
•Available for Extended Temperature Ranges:
-Commercial: 0˚C to +70˚C
-Industrial: -40˚C to +85˚C


Pinout




Specifications

V_CC  and input voltages w.r.t. V_SS.......-0.6V to + 6.25V
Voltage on OE</a>  w.r.t. V_SS..............-0.6V to +13.5V
Voltage on A9 w.r.t. V_SS......................-0.6V to +13.5V
Output Voltage w.r.t. V_SS................-0.6V to V_CC+0.6V
Storage temperature..........................-65˚C to +125˚C
Ambient temp. with power applied.......-50˚C to +95˚C


Description

The Microchip Technology Inc. 28C17A is a CMOS 16K non- volatile electrically Erasable PROM.  The 28C17A  is accessed like a static RAM for the read or write cycles without the need of external components.  During a "byte write", the address and data are latched internally, freeing the micropro- cessor address and data bus for other operations.  Following the initiation of write cycle, 28C17A will go to a busy state and automatically clear and write the latched data using an internal control timer.  To determine when the write cycle is complete, the user has a choice of monitoring the Ready/ Busy</a>  output or using Data</a>  polling. The Ready/Busy</a>  pin is an open drain output, which allows easy configuration in wired-or systems.  Alternatively, Data</a>  polling allows the user to read the location last written to when the write operation is com- plete.  CMOS design and processing enables this part to be used in systems where reduced power consumption and reli- ability are required.  A complete family of packages is offered to provide the utmost flexibility in applications.