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100ELT23

Features: · Typical propagation delay of 3.5 ns· TTL output drive: IOH = 24 mA; IOL = −3 mA· Flow through pinout· Q Output will default to a LOW with the inputs left Open· Internal pull-down resistors on inputs· Fairchild MSOP-8 package is a drop-in replacement to ON TSSOP-8· Typical ICCH of...

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SeekIC No. : 004207296 Detail

100ELT23: Features: · Typical propagation delay of 3.5 ns· TTL output drive: IOH = 24 mA; IOL = −3 mA· Flow through pinout· Q Output will default to a LOW with the inputs left Open· Internal pull-down r...

100ELT23 Data Sheet

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Part Number:
100ELT23
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/11

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Product Details

Description



Features:

· Typical propagation delay of 3.5 ns
· TTL output drive: IOH = 24 mA; IOL = −3 mA
· Flow through pinout
· Q Output will default to a LOW with the inputs left Open
· Internal pull-down resistors on inputs
· Fairchild MSOP-8 package is a drop-in replacement to ON TSSOP-8
· Typical ICCH of 23 mA, ICCL of 26 mA
· Meets or exceeds JEDEC specification EIA/JESD78 IC latch-up test
· Moisture Sensitivity Level TBD
· ESD Performance: Human Body Model > TBD Machine Model > TBD


Specifications

PECL Supply Voltage (VCC) ....  0.0V to +7V
Input Voltage (VI) ...  VI VCC 0.0V to + 6V
Storage Temperature (TSTG) .−65 to + 150
Junction to Ambient (JA) SOIC 0LFPM ..   TBD
500LFPM ..................TBD
Junction to Case (JC) SOIC std bd .... TBD
Junction to Ambient (JA) MSOP 0LFPM..  TBD
500LFPM ..................TBD
Junction to Case (JC) MSOP std bd.... TBD


Description

The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply.

The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal.

The 100 series is temperature compensated.




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