Published:2011/4/1 4:05:00 Author:Joan | Keyword: Shanghai GM , Buick LaCrosse car , automatic transmission
Below is the 4T65E automatic transmission circuit of Shanghai GM Buick LaCrosse (3):
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Published:2011/4/1 4:06:00 Author:Joan | Keyword: Shanghai GM , Cadillac XLR , engine
Shanghai GM Cadillac XLR engine diagram (1)
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Published:2011/4/1 4:07:00 Author:Joan | Keyword: Shanghai GM , Buick LaCrosse , automatic transmission
Below is the 4T65E automatic transmission circuit of Shanghai GM Buick LaCrosse (2):
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Published:2011/3/31 22:45:00 Author:Joan | Keyword: Shanghai GM , Cadillac CTS car , anti-theft system
Shanghai GM Cadillac CTS car anti-theft system schematic (3)
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Published:2011/3/31 22:47:00 Author:Joan | Keyword: Shanghai GM , Cadillac CTS car , anti-theft system
Shanghai GM Cadillac CTS car anti-theft system circuit diagram (2)
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Published:2011/4/1 1:05:00 Author:Joan | Keyword: Shanghai GM , Buick LaCrosse car , automatic transmission
Below is Shanghai GM Buick LaCrosse car 4T65E automatic transmission circuit:
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Published:2011/4/1 1:07:00 Author:Joan | Keyword: Shanghai GM , Cadillac CTS car , anti-theft system
Shanghai GM Cadillac CTS car anti-theft system schematic (1)
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Published:2011/4/1 1:09:00 Author:Joan | Keyword: Shanghai GM , Cadillac CTS car , vehicle navigation system
Shanghai GM Cadillac CTS car vehicle navigation system schematic (3)
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Published:2011/4/1 1:14:00 Author:Joan | Keyword: Shanghai GM , Buick LaCrosse car , 2.4L engine
Below is Shanghai GM Buick LaCrosse car 2.4L engine circuit diagram:
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Published:2011/4/1 1:11:00 Author:Joan | Keyword: Shanghai GM , Cadillac CTS car , vehicle navigation system
Shanghai GM Cadillac CTS car vehicle navigation system schematic (2)
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Published:2011/3/30 2:55:00 Author:Ecco | Keyword: digital circuit , input J - K negative edge , trigger
74 series digital circuit of 74H101 input J - K negative edge trigger( with preset terminal)
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Published:2011/3/30 2:52:00 Author:Ecco | Keyword: digital circuit , 8 bi-stable latch
74100 8 bi-stable latch
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Published:2011/3/31 22:19:00 Author:Ecco | Keyword: digital circuit, 5-bit, shift register
7496, 74L96,74LS96, 74HC965-bit shift register: To complete binary data in the conversion of parallel-serial or serial-parallel.
Before establishing stable state input, QAo, QBo, QCo, QDo=QA, QS, QC, QD. Before the latest clock shift, QAn, QBn, QCn, QDn=QA, QS, QC, QD. (View)
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Published:2011/3/31 22:07:00 Author:Ecco | Keyword: digital circuit , 4-bit , parallel access , shift register
7495A, 74LS95B, 74HC95, 74C954-bit parallel access shift register
It has the parallel input and serial input, parallel output, mode control and two clock input; There are 3 compute modes, parallel writing, right shift (from QA to QD), left shift(from QD to QA).
When doing left shift, QB connects A, QC connects to B, QD connects C, the serial data is input by D, a, b, c, d are equal to the level of A, B, C, D which are stable state input levels. Before establishing stable state input, QAo, QBo, QCo, QDo=QA, QS, QC, QD. Before the latest clock shift, QAn, QBn, QCn, QDn=QA, QS, QC, QD. (View)
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Published:2011/3/31 1:58:00 Author:Ecco | Keyword: 4 register, digital circuit
7494 4 register
To execute the backward-shift operation, it is used as a serial registers or dual-source and parallel serial converter.
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Published:2011/4/1 3:39:00 Author:Ecco | Keyword: digital circuit, double 4-bit, input expander
7460 74H60 double 4-bit input expander
The maximum parallel number is 4; To 7460, X=ABCD; To 74H60, X=ABCD)
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Published:2011/3/31 1:49:00 Author:Ecco | Keyword: digital circuit, 4-bit binary counter
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Published:2011/4/1 3:34:00 Author:Ecco | Keyword: digital circuit , 2 input , 3 output
74HC58 2 input/3 output ( scalable)
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Published:2011/3/31 1:40:00 Author:Ecco | Keyword: digital circuit , shift register
7491A, 74L91, 74LS91, 74HC91 8 shift register
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Published:2011/3/31 1:27:00 Author:Ecco | Keyword: digital circuit, decade computer
7490A, 74L90, 74LS90, 74C90 decade computer
Binary frequency and fifth frequency; Door re-zero input and re-set 9 input (used as the complement of applications for BCD9); To utilize the maximum count length of the counter, the input B and output QA could be connected, after input count pulse adds to input A, the out is like the description shown in the menu: output QD connects to input A, and adds the input count to output QA. It will produce input B of frequency square-wave, and get symmetrical frequency count.
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