VOCAL_STRIPPER

Published:2009/6/22 23:29:00 Author:May

The schematic of the lead vocal filter is shown in the figure. The left and right channel signals are coupled through C1 and'C2 to buffer amps IC4-a and IC4-b. From the buffer amps, the left and right channel signals pass through active crossovers IC5-a and IC5-b, sending all low frequencies to a final mixer IC6-c, and all middle and high frequencies to analog delay lines IC1 and IC2, RD5106256-sam-ple bucket-brigades. Integrated circuit IC2 delays the left-channel signal by 2.4 ms, set by the fixed-frequency clock generated by 1/2IC3, R47, and C24. The right channel signal is delayed by IC1 with a variable-frequency clock generated by 1/2IC3, R48, R49, and C23. Potentiometer R49 is used for phase adjustment.The output of each delay line from IC1 and IC2 passes through low-pass filters IC6-a and -d, and their associated parts, to filter out high-frequency sample-steps produced by IC1 and IC2. Balance control R36 is adjusted for equal amplitude of the left and right channels. ICG-b is a difference am-plifier that cancels all lead vocals that are common to both channels. The resulting signal from ICG-b is remixed with low frequencies by ICG-c and is then sbnt to the output via buffers IC4-c and IC4-d.   (View)

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PRACTICAL_DIFFERENTIATOR

Published:2009/6/22 23:18:00 Author:May

A differentiator has a high-pass charactenstic. Components are chosen by using the design equations.   (View)

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CAPACITANCE_MULTIPLIER

Published:2009/6/22 23:17:00 Author:May

  (View)

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PHASE_LOCKED_LOOP

Published:2009/6/22 23:15:00 Author:May

The PLL will lock onto an input signal. Both triangle- and square-wave outputs are available.A quad op amp can be used in this circuit, which should be useful in the audio and LF radio region.   (View)

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EEPROM_PROGRAMMING_DOUBLER_CIRCUIT

Published:2009/6/22 23:08:00 Author:May

Even though electrically erasable PROMs offer the convenience of single-byte write and erase operations, the parts require a somewhat nonstandard programming voltage-21 V. A simple circuit that develops the appropriate voltage from a computer system's standard 12-to-15-Vdc supply, reme-dies the problem nicely. Moreover, it permits the programming voltage to be pulsed under the control of an extemal CPU.As shown in the figure, the chip uses its complementary outputs, Q1 and Q2 to trigger a bridge rectifier through capacitors C2 and C3. Resistors R2 and R3 and diodes Dl and D2limit the current and protect IC1 from spikes from C2 and C3. If required, the regulator will deliver up to 150 mA.Circuit IC3 is an open-collector TTL gate whose output, when low, disables IC2 and causes it to put out 5 Vdc. The regulator delivers the 21-V programming pulse.   (View)

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FREQUENCY_DOUBLER

Published:2009/6/22 23:05:00 Author:May

An Analog Devices AD734 four-quadrant analog multiplier is used as a frequency doublen.   (View)

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7805_TURN_ON_CIRCUIT

Published:2009/6/22 23:03:00 Author:May

A logic level can control a 7805 regulator with this circuit. Q2 is a series switching transistor controlled by Q1. Q1 is tumed on by a logic voltage to its base.   (View)

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KEY_WIRELESS_RTS_WITH_DATA

Published:2009/6/22 23:02:00 Author:May

This simple keyer supplies both the RTS control and data delay needed to interface a digital ra-dio with an RS-232, data-only system. It supports speeds to 19.2 kbits/s sync or async.   (View)

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VIDEO，POWER，AND_CHANNEL_SELECT_SIGNAL_CARRIER

Published:2009/6/22 23:01:00 Author:May

In the video system of Figs. A and B, a single coaxial cable carries power to the remote location, selects one of eight video channels, and returns the selected signal. The system can choose one of several remote surveillance-camera signals, for example, and display the picture on a monitor near the interface box. The heart of the multiplexer box (A) is a combination 8-channel rnultiplexer and amplifier (ICl). C11 couples the multiplexer's baseband video output to the coax, and L1 decouples the video from dc power arriving on the same line. This power-approximately 30 mA at 10 V-supplies all circuitry in the multiplexer box. In interface box (B), a desired channel is encoded by three bits, set either by switches as shown or by an applied digital input. Momentary depression of the send button triggers clownconverter IC1 and gated oscillator IC2A to initiate a channel-selection burst.   (View)

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MOSFET_DRIVE_CURRENT_BOOSTER

Published:2009/6/22 23:01:00 Author:May

A clean and inexpensive way to eliminate the floating-gate supply is to use the voltage available at the MOSFET's drain to drive its gate. Tying the collector of Q1(a high-voltage, small-signal, 400-V NPN)to the MOSFET's drain supplies sufficient gate-drive voltage when it's needed most-when the MOSFET's drain-to-source voltage is high. Two such circuits used back-to-back form an ac relay.Using the emitter follower attached to the drain increases gate-drive current and decreases the MOSFET's turn-on time by a factor equal to the high-voltage NPN's beta. The resulting drain-to-source voltage fall times depend on the MOSFET's size and its required gate charge. The circuit that's used gives a fall time of 200 ps for an MTP10N2f5 10-A, 250-V MOSFET. With such fall times cutting switching losses, pulse-width modulation at frequencies under 100 Hz is possible.During tune-on, VDS falls rapidly until it reaches the sum of the 1N914 diode's 0.7-V drop, the collector-emitter saturation voltage of Q1, and the gate-to-source voltage required to support the load cur-rent. At that point, the diode array completes the MOSFET's turn-on, unaided by the buffer. This slows the fall of 7,s considerably when it reaches about 5 to 7 V. In high-voltage, low-frequency systems, tail-'ma of VDS is tolerable because the tail's voltage magnitude constitutes a small fraction of the switching voltage. The IN914 makes it possible for VGS to exceed VDS as the MOSFET completes turn-on.   (View)

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PHOTODIODE_LOG_CONVERTER_TRA_NSMITTER

Published:2009/6/22 23:00:00 Author:May

A logarithmic conversion is made on the output current of a photodiode to compress a fourdecade, light-intensity variation into a standard transmission range. The circuit is balanced at midrange, where R3 should be chosen so that the current through it equals the photodiode current. The log-conversion slope is temperature compensated with R6. Setting the reference output to 1.22 V gives a current through R2 that is proportional to absolute temperature because of D1 so that this level-shift voltage matches the temperature coefficient of R6. C1 has been added so that large-area photodiodes with high capacitance do not cause frequency instabilities.   (View)

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TELEPHONE_HOLD_CIRCUIT

Published:2009/6/22 22:57:00 Author:May

When S1 is pressed, the SCR fires, and places LED1 and R1 across the phone line. The line volt-age drops to about 20 V, which holds the connec-tion to the phone company's central office.   (View)

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The internal circuit diagram of crystal triodes EMG1,UMG1N

Published:2011/7/21 3:08:00 Author:Ecco | Keyword: crystal triodes, internal circuit

The internal circuit diagram of crystal triode EMG1,UMG1N is as below:   (View)

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PRINTER_PORT

Published:2009/6/22 22:55:00 Author:May

A 16-step programmable current generator can be modified so that it's controllable by a printer port. This is done by switching the resistor connected between the output of the generator's OA1 op amp and the input of OA2. The CMOS single 16-channel analog multiplexer (ICl) chooses one resis-tor at a time, in accordance with the code sent by the printer port through four of its eight data-out-put lines (pins 2 to 9). In addition, one control line (pin 1) is used to enable the operation. As a result, 16 outputs can be selected by a 4-bit word (the table shows the relationship between data word and selected resistor).The following must be fulfilled in order for the circuit to work as a true current generator: R2×Rd-Rb×Rc =0 The smaller the resistors' tolerance (especially RI through R16), the greater the output resis-tance of the generator.Because the OA2 is connected as a repeater, the current I2 = O, and only the load current flows through one of the RI through R16 resistors. Therefore: where Vout＝Vin；X＝1…16；and Ron≤150Ω（for VDD＝10 V) is the resistance of one analog switch（CD4067）in conduction Therefore，the values of resistors R1 through R16 can be inferred from the needed currents∶ The Turbo c＋＋ program also controls the current through the load   (View)

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TELEPHONE_AUDIO_INTERFACE

Published:2009/6/22 22:52:00 Author:May

Used to record and play back tapes vla the phone lines，this simple circuit has an audio level switch (S1).   (View)

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FREQUENCY_DIVIDER_FOR_MEASUREMENTS

Published:2009/6/22 22:49:00 Author:May

This circuit is meant to be driven by a 1-MHz standard signal of a few volts amplitude. U1 through U5 are 7490 decade counter/divider and produce a division ratio of 100,000:1. Successive divisions of 10 can be tapped off, if desired, between stages. One or more stages can be added for still lower frequencies.   (View)

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SET_TIME_WINDOWS_WITHIN_A_CLOCK

Published:2009/6/22 22:49:00 Author:May

At times, it is necessary to produce pulses of adjustable width and whose start times might vaty with reference to a master clock. The input signal is inverted and buffered by U1A, while U1B and U1C reinvert the signal to produce square, buffered renditions of the input signal. Potentiometers R3 and R4 set references for the comparators.The input polarity of U2A keeps its output transistor tumed on until the voltage at the nonin-verting input exceeds the reference set by R4 (the rising edge adjustment). When this reference voltage is exceeded, the output transistor is turned off and the output signal is pulled up via R6.Meanwhile, the input polarity of U2B keeps its output transistor turned off until the voltage at the in-verting input exceeds the reference set by R3 (the falling edge adjustment). When this reference voltage is surpassed, the output transistor of U2B is turned on, pulling the output signal low through the wired-OR conftguration of U2. The output of U2 is then double-inverted and buffered by U1D and U1E. What results is a pulse whose start time (rising edge) can be adjusted by R4, and whose stop time (falling edge) can be adjusted by R3.The output of the comparators is pulled up to the input waveform through resistor R6 to U1C.This prevents the comparators from switching during the low cycle of the input waveform, regard-less of the positions of R3 and R4. This has the effect of locking out changes during the low period of the input signal, and would probably require additional logic if it were done strictly in the digital domain.The circuit, with the component values shown, works well between about 50 and 150 kHz.   (View)

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PROGRAMMABLE_RESISTOR_CIRCUIT

Published:2009/6/22 22:49:00 Author:May

IC1　CD4066 quad bilateral switchC1　 0.1-μF capacitorRI 10-kΩ, 1/4-W 5% resistorR2 4.7-kΩ, 1/4-W 5% resistorR3 2.2-kΩ, 1/4-W 5% resistorR4 1-kΩ, 1/4-W 5% resistorR5 1-MΩ, 1/4-W 5% resistor A programmable resistor can replace a potentiometer or fixed resistor. Remember that the ON resistance of IC1 might have to be taken into account in some applications.   (View)

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PROGRAMMABLE_CAPCITOR_CIRCUIT

Published:2009/6/22 22:42:00 Author:May

IC1 CD4066 quad bilateral switchG1 10-μF， 25-V capacitorC2 22-μF， 25-V capacitorC3 47-μF， 25-V capacitor04 100-μF，25-V capacitorC5 1-μF， 25-V capacitor06 0.1-μF， 25-V capacitorThe programmable capacitor can be very useful in circuits where you need to switch capacitance values. Remember that the ON resistance of IC1 appears in series with the capacitors and must be taken into account in some applications as it is not negligible.   (View)

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PHOTODIODE_ANIPLIFIEB

Published:2009/6/22 22:41:00 Author:May

A photodiode amplifier combined with a dc-restoration circuit will reject low-frequency ambient backgroud,easing measurement of a light signal.   (View)

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