VSC9195, VSC9195EV, VSC9195SM Selling Leads, Datasheet
MFG:800 D/C:VITESSE
VSC9195, VSC9195EV, VSC9195SM Datasheet download
Part Number: VSC9195
MFG: 800
Package Cooled:
D/C: VITESSE
VSC9195, VSC9195EV, VSC9195SM
- Table of contents:
Info of VSC9195
Info of VSC9195EV
Info of VSC9195SM
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About VSC9195
PDF/DataSheet Download
Datasheet: VSC9195
File Size: 453386 KB
Manufacturer: VITESSE [Vitesse Semiconductor Corporation]
Download : Click here to Download
About VSC06P-C-M40A
PDF/DataSheet Download
Datasheet: VSC06P-C-M40A
File Size: 107872 KB
Manufacturer: ITT [ITT Industries]
Download : Click here to Download
About VSC06P-C-M40A
PDF/DataSheet Download
Datasheet: VSC06P-C-M40A
File Size: 107872 KB
Manufacturer: ITT [ITT Industries]
Download : Click here to Download
VSC9195 General Description
The VSC9195 is a 136 x 136 Time Slot Interchange (TSI) Switch IC supporting TFI-5 (STS-48 like frame) data on every
input and output. All inputs and outputs are differential serial signals running at 2.488 Gb/s for TDM signals, or 2.125 Gb/s, or 2.488-2.67 Gb/s for signals to be routed transparently.
The device contains a fully non-blocking STS-1 switching matrix surrounded by serial back plane interfaces that incorporate fully integrated clock recovery and synthesis, input equalization, output pre-emphasis, TFI-5/SONET/SDH compliant scrambling, framing, de-skew and alarms. Ports to drop and insert overhead bytes are included. A multi-mode CPU interface is used for device configuration and status monitoring.
VSC9195 Features
·136 x 136 TSI Switch with Non-blocking 6528 x 6528 STS-1 Switch Matrix (340G Aggregate Bandwidth)
·Bit-sliced Switching Mode Provides 13056 x 13056 Connectivity at Half Bandwidth (68x68 ports) Enabling a
One-stage 680G Fabric with Four Switch Chips
·Serial TFI-5 2.488 Gb/s High-speed Interface with EQ and Pre-emphasis
· Hitless Reconfiguration of TSI Mapping
· Split Frame Domain Support (2 Domains per Chip)
· Two Overhead Ports to Drop and Add OH Bytes for Automatic Protection Switching Support and In-band Messaging
· Cross-connect Program Memory Integrity Monitoring
· LOS Detection, Input Parity Checking and Output Parity Insertion, Scrambling and Descrambling
·Transparent Mode Enables Switching Among Complete Ports Independent of Rate and Protocol, at 2.125,
and 2.488-2.67 Gb/s
·Can Act as a Static Slice/Merge Device to Support other VSC9195
Devices in a Bit-sliced Fabric
·Bit-sliced Switching Mode Provides 13056 x 13056 Connectivity at Half Bandwidth (68x68 ports) Enabling a
One-stage 680G Fabric with Four Switch Chips
·Serial TFI-5 2.488 Gb/s High-speed Interface with EQ and Pre-emphasis
· Hitless Reconfiguration of TSI Mapping
· Split Frame Domain Support (2 Domains per Chip)
· Two Overhead Ports to Drop and Add OH Bytes for Automatic Protection Switching Support and In-band Messaging
· Cross-connect Program Memory Integrity Monitoring
· LOS Detection, Input Parity Checking and Output Parity Insertion, Scrambling and Descrambling
·Transparent Mode Enables Switching Among Complete Ports Independent of Rate and Protocol, at 2.125,
and 2.488-2.67 Gb/s
·Can Act as a Static Slice/Merge Device to Support other VSC9195
Devices in a Bit-sliced Fabric
VSC9195 Typical Application
·Central Switch in 170 Gb/s to 340 Gb/s STS-1 Grooming Fabric
· Switch Element for 680 Gb/s to 1.36 Tb/s STS-1 Grooming Fabric
· Bit-slicing Engine for 680 Gb/s to 1.36 Tb/s STS-1 Grooming Fabric
· Ingress/Egress Device for Multi-terabit STS-1 Grooming Clos Fabric
· Synchronous Transparent Crosspoint Switch for Generic Circuit or Packet Switching
· Switch Element for 680 Gb/s to 1.36 Tb/s STS-1 Grooming Fabric
· Bit-slicing Engine for 680 Gb/s to 1.36 Tb/s STS-1 Grooming Fabric
· Ingress/Egress Device for Multi-terabit STS-1 Grooming Clos Fabric
· Synchronous Transparent Crosspoint Switch for Generic Circuit or Packet Switching
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