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TS835, TS836-4IDT, TS8388BF

Table of contents:
Info of TS835
Info of TS836-4IDT
Info of TS8388BF

TS835, TS836-4IDT, TS8388BF Selling Leads, Datasheet

MFG:STMicroelectronics Category:Integrated Circuits (ICs) Package Cooled:2004+ D/C:84

TS835, TS836-4IDT, TS8388BF Datasheet download

Five Points

Part Number: TS836-4IDT

Category: Integrated Circuits (ICs)

MFG: STMicroelectronics

Package Cooled: 2004+

D/C: 84

Description: IC SUPERVISOR VOLT RESET SO-8

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TS836-4IDT Parameters

Technical/Catalog Information	TS836-4IDT
Vendor	STMicroelectronics
Category	Integrated Circuits (ICs)
Output	Open Drain or Open Collector
Reset	Active High
Package / Case	8-SOIC (3.9mm Width)
Packaging	Tape & Reel (TR)
Number of Voltages Monitored	1
Reset Timeout	20 s Typical Response Time
Type	Simple Reset/Power-On Reset
Voltage - Threshold	4.5V
Operating Temperature	-40°C ~ 85°C
Drawing Number	*
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	TS836 4IDT TS8364IDT

TS8388BF General Description

The TS8388BF is a monolithic 8-bit analog-to-digital converter, designed for digitizingwide bandwidth analog signals at very high sampling rates of up to 1 GSPS.

The TS8388BF uses an innovative architecture,including an on-chip Sample and Hold (S/H),and is fabricated with an advancedhigh speed bipolar process.

The on-chip S/H has a 1.5 GHz full powerinput bandwidth, providing excellent dynamicperformance in undersampling applications(High IF digitizing).

TS8388BF Maximum Ratings

Parameter	Symbol	Comments	Values	Unit
Positive supply voltage	V_CC		GND to 6	V
Digital negative supply voltage	D_VEE		GND to -5.7	V
Digital positive supply voltage	V_PLUSD		GND -0.3 to 2.8	V
Negative supply voltage	V_EE		V_GND to -6	V
Maximum difference between negative supply voltage	DV_EE to V_EE		0.3	V
Analog input voltages	V_{IN or}V_INB		-1 to +1	V
Maximum difference between VIN and VINB	V_IN - V_INB		-2 to +2	V
Digital input voltage	V_D	GORB	-0.3 to V_CC +0.3	V
Digital input voltage	V_D	DRRB	V_EE -0.3 to +0.9	V
Digital output voltage	V_O		V_PLUSD -3 to V_PLUSD -0.5	V
Clock input voltage	V_CLK or V_CLKB		-0.3 to V_CC +0.3	V
Maximum junction temperature	V_CLK - V_CLKB		V_EE -0.3 to +0.9	V
Junction temperature	T_J		V_PLUSD -3 to V_PLUSD -0.5	°C
Storage temperature	T_stg		- 65 + 150	°C
Lead temperature (soldering 10s)	T_leads		+300	°C

TS8388BF Features

• 8-bit Resolution
• ADC Gain Adjust
• 1.5 GHz Full Power Input Bandwidth (-3 dB)
• 1 GSPS (min) Sampling Rate
• SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc,at FS = 1 GSPS, FIN = 20 MHz
• SINAD = 42.9 dB (7.0 Effective Bits), SFDR = 52 dBc,at FS = 1 GSPS, FIN = 500 MHz
• SINAD = 40.3 dB (6.8 Effective Bits), SFDR = 50 dBc,at FS = 1 GSPS, FIN = 1000 MHz (-3 dB FS)
• 2-tone IMD: -52 dBc (489 MHz, 490 MHz) at 1 GSPS
• DNL = 0.3 lsb, INL = 0.7 lsb
• Low Bit Error Rate (10-13) at 1 GSPS
• Very Low Input Capacitance: 3 pF
• 500 mVpp Differential or Single-ended Analog Inputs
• Differential or Single-ended 50Ω ECL Compatible Clock Inputs
• ECL or LVDS/HSTL Output Compatibility
• Data Ready Output with Asynchronous Reset
• Gray or Binary Selectable Output Data; NRZ Output Mode
• Power Consumption: 3.4W at Tj = 70°C Typical
• Radiation Tolerance Oriented Design (150 Krad (Si) measured)
• Two Package Versions
• ESA/SCC Detailed Specification Available on Request
• Enhanced CQFP68 Packaged Device: TS8388BFS
• Evaluation board: TSEV8388BF
• Demultiplexer: TS81102G0: Companion Device Available

TS8388BF Typical Application

• Digital Sampling Oscilloscopes
• Satellite Receiver
• Electronic Countermeasures/Electronic Warfare
• Direct RF Down-conversion

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