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TMC2250A, TMC2250AG1C, TMC2250AG1C2

TMC2250A, TMC2250AG1C, TMC2250AG1C2 Selling Leads, Datasheet

MFG:Fairchild  Package Cooled:N/A  D/C:09+

TMC2250A, TMC2250AG1C, TMC2250AG1C2 Picture

TMC2250A, TMC2250AG1C, TMC2250AG1C2 Datasheet download

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Part Number: TMC2250A

 

MFG: Fairchild

Package Cooled: N/A

D/C: 09+

 

 

 
 
 
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About TMC2250A

PDF/DataSheet Download

Datasheet: TMC2250A

File Size: 197347 KB

Manufacturer: FAIRCHILD [Fairchild Semiconductor]

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About TMC2250AG1C

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Datasheet: TMC2250AG1C

File Size: 191477 KB

Manufacturer: FAIRCHILD [Fairchild Semiconductor]

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About TMC2250AG1C2

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Datasheet: TMC2250AG1C2

File Size: 191477 KB

Manufacturer: FAIRCHILD [Fairchild Semiconductor]

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TMC2250A General Description

The TMC2250A is a flexible high-performance nine-multiplier array VLSI circuit which can execute a cascadeable 9-tap FIR filter, a cascadeable 4 x 2 or 3 x 3-pixel image convolution, or a 3 x 3 color space conversion. All configurations offer throughput at up to the maximum guaranteed 50 MHz clock rate with 12-bit data and 10-bit coefficients. All inputs and outputs are registered on the rising edges of the clock.
The 3 x 3 matrix multiply or color conversion configuration can perform video standard conversion (YIQ or YUV to RGB, etc.) or three-dimensional perspective translation at real-time video rates.
The 9-tap FIR filter configuration, useful in Video, Telecommunications, and Signal Processing, features a 16-bit cascade input to allow construction of longer filters.
The cascadeable 3 x 3 and 4 x 2-pixel image convolver functions allow the user to perform numerous image processing functions, including static filters and edge detectors. The 16-bit cascade input port facilitates two-chip 50 MHz cubic convolution (4 x 4-pixel kernel).
The TMC2250A is fabricated in a sub-micron CMOS process and operates at clock speeds of up to 50 MHz over the full commercial (0°C to 70°C) temperature and supply voltage ranges. It is available in 120-pin Plastic Pin Grid Array
(PPGA) packages, 120-lead Ceramic Pin Grid Array package (CPGA), 120-lead PQFP to PPGA package (MPGA) and 120-lead Plastic Quad FlatPack (PQFP). All input and output signals are TTL compatible.

TMC2250A Features

• Four user-selectable filtering and transformation
   functions:
   Triple dot product (3 x 3) matrix multiply
  Cascadeable 9-tap systolic FIR filter
  Cascadeable 3 x 3-pixel image convolver
  Cascadeable 4 x 2-pixel image convolver
• 50 MHz (20ns) pipelined throughput
• 12-bit input and output data, 10-bit coefficients
• 6-bit cascade input and output ports in all filter modes
• Onboard coefficient storage, with three-cycle updating of
  all nine coefficients

TMC2250A Typical Application

• Image filtering and manipulation
• Video effects generation
• Video standards conversion and encoding/decoding
• Three-dimensional image manipulation
• Medical image processing
• Edge detection for object recognition
• FIR filtering for communications systems

TMC2250A Connection Diagram

TMC2250AG1C2 General Description

The TMC2250A is a flexible high-performance nine-multiplier array VLSI circuit which can execute a cascadeable 9-tap FIR filter, a cascadeable 4 x 2 or 3 x 3-pixel image convolution, or a 3 x 3 color space conversion. All configurations offer throughput at up to the maximum guaranteed 50 MHz clock rate with 12-bit data and 10-bit coefficients. All inputs and outputs are registered on the rising edges of the clock.
The 3 x 3 matrix multiply or color conversion configuration can perform video standard conversion (YIQ or YUV to RGB, etc.) or three-dimensional perspective translation at real-time video rates.
The 9-tap FIR filter configuration, useful in Video, Telecommunications, and Signal Processing, features a 16-bit cascade input to allow construction of longer filters.
The cascadeable 3 x 3 and 4 x 2-pixel image convolver functions allow the user to perform numerous image processing functions, including static filters and edge detectors. The 16-bit cascade input port facilitates two-chip 50 MHz cubic convolution (4 x 4-pixel kernel).
The TMC2250A is fabricated in a sub-micron CMOS process and operates at clock speeds of up to 50 MHz over the full commercial (0°C to 70°C) temperature and supply voltage ranges. It is available in 120-pin Plastic Pin Grid Array
(PPGA) packages, 120-lead Ceramic Pin Grid Array package (CPGA), 120-lead PQFP to PPGA package (MPGA) and 120-lead Plastic Quad FlatPack (PQFP). All input and output signals are TTL compatible.

TMC2250AG1C2 Features

• Four user-selectable filtering and transformation
   functions:
   Triple dot product (3 x 3) matrix multiply
  Cascadeable 9-tap systolic FIR filter
  Cascadeable 3 x 3-pixel image convolver
  Cascadeable 4 x 2-pixel image convolver
• 50 MHz (20ns) pipelined throughput
• 12-bit input and output data, 10-bit coefficients
• 6-bit cascade input and output ports in all filter modes
• Onboard coefficient storage, with three-cycle updating of
  all nine coefficients

TMC2250AG1C2 Typical Application

• Image filtering and manipulation
• Video effects generation
• Video standards conversion and encoding/decoding
• Three-dimensional image manipulation
• Medical image processing
• Edge detection for object recognition
• FIR filtering for communications systems

TMC2250AG1C2 Connection Diagram

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